From 73b5446e9a64adb1cc55da1982447251babe2076 Mon Sep 17 00:00:00 2001 From: Zoltan HERPAI Date: Tue, 29 Mar 2016 11:42:14 +0000 Subject: package: uboot-sunxi: various changes - bump to 2016.03 - add bugfixes related to 2016.03 update - sync DTS files with mainline - add support for non-standard uEnv.txt - add initial support for Theobroma A31-yQ7 devboard Signed-off-by: Zoltan HERPAI git-svn-id: svn://svn.openwrt.org/openwrt/trunk@49089 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../patches/012-sun6i-fix-clock_twi_onoff.patch | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 package/boot/uboot-sunxi/patches/012-sun6i-fix-clock_twi_onoff.patch (limited to 'package/boot/uboot-sunxi/patches/012-sun6i-fix-clock_twi_onoff.patch') diff --git a/package/boot/uboot-sunxi/patches/012-sun6i-fix-clock_twi_onoff.patch b/package/boot/uboot-sunxi/patches/012-sun6i-fix-clock_twi_onoff.patch new file mode 100644 index 0000000000..9471b39b3b --- /dev/null +++ b/package/boot/uboot-sunxi/patches/012-sun6i-fix-clock_twi_onoff.patch @@ -0,0 +1,40 @@ +From 730d2f3a41c5ccae71b5008fffdf697d143be68c Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Wed, 16 Mar 2016 20:44:51 +0100 +Subject: [PATCH] sunxi: Fix clock_twi_onoff for sun6i + +The clock_sun6i.c implementation was not deasserting the reset for +the regular i2c controllers, this commit fixes this. + +Signed-off-by: Hans de Goede +Acked-by: Ian Campbell +--- + arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 11 ++++++++--- + 1 file changed, 8 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c +index 700b605..4e1e1a4 100644 +--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c ++++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c +@@ -100,13 +100,18 @@ int clock_twi_onoff(int port, int state) + return 0; + } + +- /* set the apb clock gate for twi */ +- if (state) ++ /* set the apb clock gate and reset for twi */ ++ if (state) { + setbits_le32(&ccm->apb2_gate, + CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port)); +- else ++ setbits_le32(&ccm->apb2_reset_cfg, ++ 1 << (APB2_RESET_TWI_SHIFT + port)); ++ } else { ++ clrbits_le32(&ccm->apb2_reset_cfg, ++ 1 << (APB2_RESET_TWI_SHIFT + port)); + clrbits_le32(&ccm->apb2_gate, + CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port)); ++ } + + return 0; + } -- cgit v1.2.3