| Commit message (Collapse) | Author | Age | Files | Lines |
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9d0608eef3e5b9fca - "lantiq: VG3503J - merge profiles"
resulted in the dts file missing the version string.
Signed-off-by: John Crispin <john@phrozen.org>
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Use the 11G firmware for the phys as the oem firmware does.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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The only difference between the VG3503J profiles is the version of the
gphy firmware that gets loaded. This can be handled perfect fine in one
device tree source file.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
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The RJ45 WAN port is used for xDSL as well as the IP101A.
The pins 1,2,3,6 of the RJ45 are connected to the IP101A and the
pins 4,5 are connected to the xdsl chip.
Drop the ip101a-rst node. It can't be controlled and is not required
at all.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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The STP pinmux was initially added in assumption LAN2 led is driven by
it. It worked somehow because STP group and gphy0 led0 share the GPIO.
Do it the right way by adding the gphy0 led0 the gphy function.
According to the author, the SPI node is a copy & paste leftover. Which
makes sense since nothing is connected to the SPI bus on this device.
Signed-off-by: Mathias Kresin <dev@kresin.me>
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lantiq: VGV7519 - remove/merge redundant parts in dts
lantiq: VGV7519 - cleanup pinmux configuration
lantiq: VGV7519 - add second usb port
lantiq: VGV7519 - add vlan support
lantiq: VGV7519 - get mac address from board_config partition
lantiq: VGV7519 - fix brn partition layout
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
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Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
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VGV7510KW2 with VRX288 v1.2 has brnboot 1.8 installed. Starting with
this brnboot version, the "GPHY Clock Source" isn't set anymore by
brnboot, with the result that xrx200-net fails to probe/initialize the
phys.
Use the phy clock source device tree binding to specify the clock source.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@49284 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@49282 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Starting with kernel 4.4, the use of partitions as direct subnodes of the
mtd device is discouraged and only supported for backward compatiblity
reasons.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@49280 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Based on the vg3503j_gphy_led.sh script published in the VG3503J wiki
article, the OEM Firmware uses the following PHY led functionality:
gphy led 0: LINK/ACTIVITY
gphy led 1: LINK
gphy led 2: ACTIVITY
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@49278 3c298f89-4303-0410-b956-a3cf2f4a3e73
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The VGV7510KW22 has the leds for LAN1-3 connected to pin1 of the phys
and the led for LAN4 connect to pin0 of the phy. This results with the
current configuration in a fast flashing LAN4 led as soon as a network
cable is connected. Something similar was reported on the forum[1] for
the VGV7519 as well.
Since it isn't predicable to which pin a (single) phy led is connected,
use the (default) pin1 functionality
Constant On: 10/100/1000MBit
Blink Fast: None
Blink Slow: None
Pulse: TX/RX
for all ethernet phy leds.
After checking pictures of all vr9 boards, it looks like only the VG3503J
has more than one led connected per phy. Using the phy led device tree
bindings to assign the functionality to the "additional" leds, the
VG3503J phy leds should behave as before.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
[1] https://forum.openwrt.org/viewtopic.php?pid=321523
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@49270 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Remove read-only flag on two partitions on BTHOMEHUBV3A:
uboot-config - otherwise fw_setenv command cannot be used.
ath9k-cal - so that ath9k calibration data can be copied
to the partition on a newly installed board.
Signed-off-by: Ben Mulvihill <ben.mulvihill@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@49250 3c298f89-4303-0410-b956-a3cf2f4a3e73
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With the backport of the kernel 4.5 pinctrl-xway patches (3551609d &
826bca29) the pinmux group "spi" was splitted into "spi_di", "spi_do" &
"spi_clk". But the no longer existing group "spi" is still used by some
device tree source files.
This fixes the detection of the wireless chipset of the VGV7510KW22.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48658 3c298f89-4303-0410-b956-a3cf2f4a3e73
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The stock u-boot doesn't disable unused flash banks. Therefore, the nand
driver tries to initialize a not connected NOR flash and the device
hangs on boot.
Workaround the issue by selecting the second flash bank (NAND).
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48657 3c298f89-4303-0410-b956-a3cf2f4a3e73
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All other SoC types are using "lantiq,sram" and "simple-bus" to ensure
that all child nodes are set up correctly during linux kernel
initialization (plat_of_setup(void) in arch/mips/lantiq/prom.c). Without
this some of sram child nodes might not be parsed.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48548 3c298f89-4303-0410-b956-a3cf2f4a3e73
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This removes a lot of duplicate register and interrupt definitions by
moving the xrx200-net definition to vr9.dtsi and making all devices re-
use it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48547 3c298f89-4303-0410-b956-a3cf2f4a3e73
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This adds basic support for TP-Link VR200v.
Currently the following parts are not working: FXO, Voice, DECT, WIFI (both)
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48328 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Re-defining the compatible property is not required since the correct
value is inherited from vr9.dtsi.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48295 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Compared to the "old" driver:
- Each device must assign a pinctrl setting to the SPI node to allow the
new SPI driver to configure the SPI pins.
While here we are also using separate input and output settings so we
are independent of whether the bootloader configures the pins correctly.
- We use the new "compatible" strings to make the driver choose the
correct number of chip-selects for each SoC.
- The new driver starts counting the chip-selects at 1 (instead of 0, like
the old one did). Thus we have to adjust the devices accordingly.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48293 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48290 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Also switch to the SPI definition provided by vr9.dtsi
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48289 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48288 3c298f89-4303-0410-b956-a3cf2f4a3e73
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This removes the duplicate SPI register definition.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48287 3c298f89-4303-0410-b956-a3cf2f4a3e73
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This allows devices to use SPI without having to re-define (and thus
duplicating) the whole SPI node.
By default SPI is disabled (as before) because only few devices need it.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48286 3c298f89-4303-0410-b956-a3cf2f4a3e73
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After the latest pinctrl backports there are only 50 (instead of 56 as
before) GPIOs/pins exported (thus the first GPIO on VRX200 SoCs is now
462, before it was 456). This means that any hardcoded GPIOs have to be
adjusted.
This broke the PCIe driver (which seems to be the only driver which uses
hardcoded GPIO numbers), it only reports:
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
ifx_pcie_wait_phy_link_up timeout
pcie_rc_initialize link up failed!!!!!
To prevent more of these issues in the future we remove the hardcoded
PCIe reset GPIO definition and simply pass it via device-tree (like the
PCI driver does).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48285 3c298f89-4303-0410-b956-a3cf2f4a3e73
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These were introduced in upstream commit
be14811c03cf "pinctrl/lantiq: introduce new dedicated devicetree
bindings" and finally allow us to use the individual pins within our dts
(for example spi_clk, etc.).
Please note that this changes the number of GPIOs which are available for
some SoCs. VRX200 SoCs for example only have 50 pins, but previously 56
pins were exposed. This means that all places which are using hardcoded
GPIO numbers (which are not passed via device-tree) need to be adjusted
(because the first GPIO number is now 462, instead of 456).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48284 3c298f89-4303-0410-b956-a3cf2f4a3e73
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linux 4.4 (since commit 08b3c894e56580b8ed3e601212a25bda974c3cc2
"MIPS: lantiq: Disable xbar fpi burst mode") requires that the xbar is
defined in the .dts of vrx200 (VR9) SoCs.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48056 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48044 3c298f89-4303-0410-b956-a3cf2f4a3e73
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The P2812HNU-F3 doesn't have usb leds. Only the P2812HNU-F1 has those
leds.
Reported-by: Sylwester Petela <sscapi@gmail.com>
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48043 3c298f89-4303-0410-b956-a3cf2f4a3e73
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The leds of the following boards are not renamed due to lack of
manuals/informations:
- ARV7519PW
- ARV7510PW22
- ARV4510PW
The leds of the ARV4518PWR01* boards are unchanged, since the leds doesn't
match the leds from the manual or pictures (e.g. there shouldn't be a wps led).
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48042 3c298f89-4303-0410-b956-a3cf2f4a3e73
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The BTHOMEHUBV5A has a RGB power led, where every colour is perfect to
indicate the current boot state. This patch adds support for such cases.
The existing led sequences should be the same as before.
Boards which are using a led different from power (like TDW89x0) are
changed to switch of the led after boot
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48041 3c298f89-4303-0410-b956-a3cf2f4a3e73
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dsl_control (dsl_notify.sh) is the only process which is aware of the
state of the atm/ptm interface. Use the dsl led exclusive for the dsl
line state.
On boards which don't have a distinct internet and a dsl led, let the
netdev status of the atm interface trigger the shared led.
Triggering the shared led according to the status of the ppp interface
isn't suitable, since the led would be switched of if the ppp
connection goes down, but the line is still in sync.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48040 3c298f89-4303-0410-b956-a3cf2f4a3e73
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- ARV7525PW: use the power led as dsl led as done by the stock firmware
- FRITZ3370: use the info led as internet led
- FRITZ7320: use the power led as dsl led as done by the stock firmware
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48037 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Use the same led logic and labels as the OEM firmware (red = okay,
blue = failure).
Add the red internet led.
Remove missing usb led workaround. The workaround shouldn't be in the
default configuration.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48036 3c298f89-4303-0410-b956-a3cf2f4a3e73
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No need to switch (and keep) on all leds at boot. Use the same led
logic and labels as the OEM firmware (red = okay, blue = failure).
Add the red internet led.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48035 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48034 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48033 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Beside the used labels, they are the same on both boards.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@48031 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Use the same max spi frequency as set in u-boot.
According to the datasheets, the Q64-104HIP as well as the Winbond
25Q64FVSIG support spi frequencies up to 50 MHz. During my tests, the
Q64-104HIP couldn't be recognized/initialized if the frequency
was > 40MHz.
Both chips do support fast read as well.
While touching the dts file, I fixed the dtc compiler warnings.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47994 3c298f89-4303-0410-b956-a3cf2f4a3e73
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This patch configures the correct ath9k WLAN LED polarity for the TDW8970,
and for the TDW8980 as well.
Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47969 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47918 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Still unused, but u-boot doesn't take care of the led, which results in a
permanent switched on 5GHz LED.
Signed-off-by: Mathias Kresin <openwrt@kresin.me>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47915 3c298f89-4303-0410-b956-a3cf2f4a3e73
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This patch configures the correct ath9k WLAN LED polarity for the TDW8970.
Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47913 3c298f89-4303-0410-b956-a3cf2f4a3e73
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The TDW8970 has a AR9381, which is the bgn 3x3:3 variant of the AR938x family.
The TDW8980 has a AR9287, which is the bgn 2x2:2 variant of the AR928x family.
This means that the chip for both routers is 2.4 GHz only.
Anyway, the manufacturer didn't disable the 5 GHz band in the EEPROM partition
(at least on my TDW8970).
So this patch disables the 5 GHz band.
Signed-off-by: Vittorio Gambaletta <openwrt@vittgam.net>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47912 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Now that we have redistributable vdsl/adsl firmware blobs in /lib/firmware,
we can drop the dsl_fw partition and extend the firmware partition.
Signed-off-by: Andre Heider <a.heider@gmail.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47783 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47768 3c298f89-4303-0410-b956-a3cf2f4a3e73
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47690 3c298f89-4303-0410-b956-a3cf2f4a3e73
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This reverts commit 68c2e4789b4f071ee75d39248f4d08fe8283eb28.
commit r47159 was bad
Signed-off-by: John Crispin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@47207 3c298f89-4303-0410-b956-a3cf2f4a3e73
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