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-rw-r--r--target/linux/lantiq/patches-3.18/0033-SPI-MIPS-lantiq-adds-spi-xway.patch4
-rw-r--r--target/linux/lantiq/patches-4.1/0033-SPI-MIPS-lantiq-adds-spi-xway.patch4
2 files changed, 6 insertions, 2 deletions
diff --git a/target/linux/lantiq/patches-3.18/0033-SPI-MIPS-lantiq-adds-spi-xway.patch b/target/linux/lantiq/patches-3.18/0033-SPI-MIPS-lantiq-adds-spi-xway.patch
index 9cc9349a71..81e5d39f21 100644
--- a/target/linux/lantiq/patches-3.18/0033-SPI-MIPS-lantiq-adds-spi-xway.patch
+++ b/target/linux/lantiq/patches-3.18/0033-SPI-MIPS-lantiq-adds-spi-xway.patch
@@ -42,7 +42,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+obj-$(CONFIG_SPI_XWAY) += spi-xway.o
--- /dev/null
+++ b/drivers/spi/spi-xway.c
-@@ -0,0 +1,975 @@
+@@ -0,0 +1,977 @@
+/*
+ * Lantiq SoC SPI controller
+ *
@@ -744,6 +744,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ /* Disable all interrupts */
+ ltq_spi_reg_clearbit(hw, LTQ_SPI_IRNEN_ALL, LTQ_SPI_IRNEN);
+
++ dev_err(hw->dev, "error %x\n", ltq_spi_reg_read(hw, LTQ_SPI_STAT));
++
+ /* Clear all error flags */
+ ltq_spi_reg_write(hw, LTQ_SPI_WHBSTATE_CLR_ERRORS, LTQ_SPI_WHBSTATE);
+
diff --git a/target/linux/lantiq/patches-4.1/0033-SPI-MIPS-lantiq-adds-spi-xway.patch b/target/linux/lantiq/patches-4.1/0033-SPI-MIPS-lantiq-adds-spi-xway.patch
index ffcc95ed55..5325b83373 100644
--- a/target/linux/lantiq/patches-4.1/0033-SPI-MIPS-lantiq-adds-spi-xway.patch
+++ b/target/linux/lantiq/patches-4.1/0033-SPI-MIPS-lantiq-adds-spi-xway.patch
@@ -42,7 +42,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+obj-$(CONFIG_SPI_XWAY) += spi-xway.o
--- /dev/null
+++ b/drivers/spi/spi-xway.c
-@@ -0,0 +1,989 @@
+@@ -0,0 +1,991 @@
+/*
+ * Lantiq SoC SPI controller
+ *
@@ -750,6 +750,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+ /* Disable all interrupts */
+ ltq_spi_reg_clearbit(hw, LTQ_SPI_IRNEN_ALL, LTQ_SPI_IRNEN);
+
++ dev_err(hw->dev, "error %x\n", ltq_spi_reg_read(hw, LTQ_SPI_STAT));
++
+ /* Clear all error flags */
+ ltq_spi_reg_write(hw, LTQ_SPI_WHBSTATE_CLR_ERRORS, LTQ_SPI_WHBSTATE);
+