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-rw-r--r--target/linux/generic/patches-3.13/132-mips_inline_dma_ops.patch12
-rw-r--r--target/linux/generic/patches-3.13/300-mips_expose_boot_raw.patch2
2 files changed, 3 insertions, 11 deletions
diff --git a/target/linux/generic/patches-3.13/132-mips_inline_dma_ops.patch b/target/linux/generic/patches-3.13/132-mips_inline_dma_ops.patch
index a42a049d86..798d551ce5 100644
--- a/target/linux/generic/patches-3.13/132-mips_inline_dma_ops.patch
+++ b/target/linux/generic/patches-3.13/132-mips_inline_dma_ops.patch
@@ -19,15 +19,7 @@ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
-@@ -1145,6 +1145,7 @@ config CPU_LOONGSON2F
- depends on SYS_HAS_CPU_LOONGSON2F
- select CPU_LOONGSON2
- select ARCH_REQUIRE_GPIOLIB
-+ select SYS_HAS_DMA_OPS
- help
- The Loongson 2F processor implements the MIPS III instruction set
- with many extensions.
-@@ -1377,6 +1378,7 @@ config CPU_CAVIUM_OCTEON
+@@ -1377,6 +1377,7 @@ config CPU_CAVIUM_OCTEON
select LIBFDT
select USE_OF
select USB_EHCI_BIG_ENDIAN_MMIO
@@ -35,7 +27,7 @@ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
help
The Cavium Octeon processor is a highly integrated chip containing
many ethernet hardware widgets for networking tasks. The processor
-@@ -1599,6 +1601,9 @@ config SYS_HAS_CPU_XLR
+@@ -1599,6 +1600,9 @@ config SYS_HAS_CPU_XLR
config SYS_HAS_CPU_XLP
bool
diff --git a/target/linux/generic/patches-3.13/300-mips_expose_boot_raw.patch b/target/linux/generic/patches-3.13/300-mips_expose_boot_raw.patch
index 3383bf87d0..d80fdee72d 100644
--- a/target/linux/generic/patches-3.13/300-mips_expose_boot_raw.patch
+++ b/target/linux/generic/patches-3.13/300-mips_expose_boot_raw.patch
@@ -18,7 +18,7 @@ Acked-by: Rob Landley <rob@landley.net>
config CEVT_BCM1480
bool
-@@ -2350,6 +2347,18 @@ config USE_OF
+@@ -2349,6 +2346,18 @@ config USE_OF
select OF_EARLY_FLATTREE
select IRQ_DOMAIN