/* $Id: isurf.c,v 1.12.2.4 2004/01/13 21:46:03 keil Exp $ * * low level stuff for Siemens I-Surf/I-Talk cards * * Author Karsten Keil * Copyright by Karsten Keil * * This software may be used and distributed according to the terms * of the GNU General Public License, incorporated herein by reference. * */ #include #include "hisax.h" #include "isac.h" #include "isar.h" #include "isdnl1.h" #include static const char *ISurf_revision = "$Revision: 1.12.2.4 $"; #define byteout(addr,val) outb(val,addr) #define bytein(addr) inb(addr) #define ISURF_ISAR_RESET 1 #define ISURF_ISAC_RESET 2 #define ISURF_ISAR_EA 4 #define ISURF_ARCOFI_RESET 8 #define ISURF_RESET (ISURF_ISAR_RESET | ISURF_ISAC_RESET | ISURF_ARCOFI_RESET) #define ISURF_ISAR_OFFSET 0 #define ISURF_ISAC_OFFSET 0x100 #define ISURF_IOMEM_SIZE 0x400 /* Interface functions */ static u_char ReadISAC(struct IsdnCardState *cs, u_char offset) { return (readb(cs->hw.isurf.isac + offset)); } static void WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) { writeb(value, cs->hw.isurf.isac + offset); mb(); } static void ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) { register int i; for (i = 0; i < size; i++) data[i] = readb(cs->hw.isurf.isac); } static void WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) { register int i; for (i = 0; i < size; i++){ writeb(data[i], cs->hw.isurf.isac);mb(); } } /* ISAR access routines * mode = 0 access with IRQ on * mode = 1 access with IRQ off * mode = 2 access with IRQ off and using last offset */ static u_char ReadISAR(struct IsdnCardState *cs, int mode, u_char offset) { return(readb(cs->hw.isurf.isar + offset)); } static void WriteISAR(struct IsdnCardState *cs, int mode, u_char offset, u_char value) { writeb(value, cs->hw.isurf.isar + offset);mb(); } static irqreturn_t isurf_interrupt(int intno, void *dev_id) { struct IsdnCardState *cs = dev_id; u_char val; int cnt = 5; u_long flags; spin_lock_irqsave(&cs->lock, flags); val = readb(cs->hw.isurf.isar + ISAR_IRQBIT); Start_ISAR: if (val & ISAR_IRQSTA) isar_int_main(cs); val = readb(cs->hw.isurf.isac + ISAC_ISTA); Start_ISAC: if (val) isac_interrupt(cs, val); val = readb(cs->hw.isurf.isar + ISAR_IRQBIT); if ((val & ISAR_IRQSTA) && --cnt) { if (cs->debug & L1_DEB_HSCX) debugl1(cs, "ISAR IntStat after IntRoutine"); goto Start_ISAR; } val = readb(cs->hw.isurf.isac + ISAC_ISTA); if (val && --cnt) { if (cs->debug & L1_DEB_ISAC) debugl1(cs, "ISAC IntStat after IntRoutine"); goto Start_ISAC; } if (!cnt) printk(KERN_WARNING "ISurf IRQ LOOP\n"); writeb(0, cs->hw.isurf.isar + ISAR_IRQBIT); mb(); writeb(0xFF, cs->hw.isurf.isac + ISAC_MASK);mb(); writeb(0, cs->hw.isurf.isac + ISAC_MASK);mb(); writeb(ISAR_IRQMSK, cs->hw.isurf.isar + ISAR_IRQBIT); mb(); spin_unlock_irqrestore(&cs->lock, flags); return IRQ_HANDLED; } static void release_io_isurf(struct IsdnCardState *cs) { release_region(cs->hw.isurf.reset, 1); iounmap(cs->hw.isurf.isar); release_mem_region(cs->hw.isurf.phymem, ISURF_IOMEM_SIZE); } static void reset_isurf(struct IsdnCardState *cs, u_char chips) { printk(KERN_INFO "ISurf: resetting card\n"); byteout(cs->hw.isurf.reset, chips); /* Reset On */ mdelay(10); byteout(cs->hw.isurf.reset, ISURF_ISAR_EA); /* Reset Off */ mdelay(10); } static int ISurf_card_msg(struct IsdnCardState *cs, int mt, void *arg) { u_long flags; switch (mt) { case CARD_RESET: spin_lock_irqsave(&cs->lock, flags); reset_isurf(cs, ISURF_RESET); spin_unlock_irqrestore(&cs->lock, flags); return(0); case CARD_RELEASE: release_io_isurf(cs); return(0); case CARD_INIT: spin_lock_irqsave(&cs->lock, flags); reset_isurf(cs, ISURF_RESET); clear_pending_isac_ints(cs); writeb(0, cs->hw.isurf.isar+ISAR_IRQBIT);mb(); initisac(cs); initisar(cs); /* Reenable ISAC IRQ */ cs->writeisac(cs, ISAC_MASK, 0); /* RESET Receiver and Transmitter */ cs->writeisac(cs, ISAC_CMDR, 0x41); spin_unlock_irqrestore(&cs->lock, flags); return(0); case CARD_TEST: return(0); } return(0); } static int isurf_auxcmd(struct IsdnCardState *cs, isdn_ctrl *ic) { int ret; u_long flags; if ((ic->command == ISDN_CMD_IOCTL) && (ic->arg == 9)) { ret = isar_auxcmd(cs, ic); spin_lock_irqsave(&cs
module explicit();
reg clk,d,rst,pre;
wire q;

// Here q_bar is not connected
// We can connect ports in any order
dff u0 (  
.q  	(q),
.d 	(d),
.clk 	(clk),
.q_bar 	(),
.rst 	(rst),
.pre 	(pre)
);

endmodule

// D fli-flop
module dff (q, q_bar, clk, d, rst, pre);
input clk, d, rst, pre;
output q, q_bar;
reg q;

assign q_bar = ~q;

always @ (posedge clk)
if (rst == 1'b1) begin
  q <= 0;
end else if (pre == 1'b1) begin
  q <= 1;
end else begin
  q <= d;
end

endmodule
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