#include "subcircuit.h" #include #include #include std::vector readLine() { char buffer[4096]; std::vector tokenList; while (tokenList.size() == 0 && fgets(buffer, sizeof(buffer), stdin) != NULL) { for (char *p = buffer; char *tok = strtok(p, " \t\r\n"); p = NULL) { if (p != NULL && tok[0] == '#') break; tokenList.push_back(tok); } } return tokenList; } int main() { std::string graphId; SubCircuit::Graph *graph = NULL; SubCircuit::Solver solver; std::map> initialMappings; std::vector results; std::vector mineResults; std::vector cmdBuffer; bool lastCommandExpect = false; while (1) { cmdBuffer = readLine(); if (cmdBuffer.empty()) break; printf(graph == NULL || cmdBuffer[0] == "endgraph" ? ">" : "> "); for (const auto &tok : cmdBuffer) printf(" %s", tok.c_str()); printf("\n"); lastCommandExpect = false; if (graph != NULL) { if (cmdBuffer[0] == "node" && cmdBuffer.size() >= 3) { graph->createNode(cmdBuffer[1], cmdBuffer[2]); for (int i = 3; i < int(cmdBuffer.size()); i++) { std::string portId = cmdBuffer[i]; int width = 1, minWidth = -1; if (i+1 < int(cmdBuffer.size()) && '0' <= cmdBuffer[i+1][0] && cmdBuffer[i+1][0] <= '9') width = atoi(cmdBuffer[++i].c_str()); if (i+1 < int(cmdBuffer.size()) && '0' <= cmdBuffer[i+1][0] && cmdBuffer[i+1][0] <= '9') minWidth = atoi(cmdBuffer[++i].c_str()); graph->createPort(cmdBuffer[1], portId, width, minWidth); } continue; } if (cmdBuffer[0] == "connect" && cmdBuffer.size() == 5) { graph->createConnection(cmdBuffer[1], cmdBuffer[2], cmdBuffer[3], cmdBuffer[4]); continue; } if (cmdBuffer[0] == "connect" && cmdBuffer.size() == 7) { graph->createConnection(cmdBuffer[1], cmdBuffer[2], atoi(cmdBuffer[3].c_str()), cmdBuffer[4], cmdBuffer[5], atoi(cmdBuffer[6].c_str())); continue; } if (cmdBuffer[0] == "connect" && cmdBuffer.size() == 8) { graph->createConnection(cmdBuffer[1], cmdBuffer[2], atoi(cmdBuffer[3].c_str()), cmdBuffer[4], cmdBuffer[5], atoi(cmdBuffer[6].c_str()), atoi(cmdBuffer[7].c_str())); continue; } if (cmdBuffer[0] == "constant" && cmdBuffer.size() == 5) { int constValue = cmdBuffer[4].size() > 1 && cmdBuffer[4][0] == '#' ? atoi(cmdBuffer[4].c_str()+1) : cmdBuffer[4][0]; graph->createConstant(cmdBuffer[1], cmdBuffer[2], atoi(cmdBuffer[3].c_str()), constValue); continue; } if (cmdBuffer[0] == "constant" && cmdBuffer.size() == 4) { graph->createConstant(cmdBuffer[1], cmdBuffer[2], atoi(cmdBuffer[3].c_str())); continue; } if (cmdBuffer[0] == "extern" && cmdBuffer.size() >= 3) { for (int i = 2; i < int(cmdBuffer.size()); i++) { std::string portId = cmdBuffer[i]; int bit = -1; if (i+1 < int(cmdBuffer.size()) && '0' <= cmdBuffer[i+1][0] && cmdBuffer[i+1][0] <= '9') bit = atoi(cmdBuffer[++i].c_str()); graph->markExtern(cmdBuffer[1], portId, bit); } continue; } if (cmdBuffer[0] == "allextern" && cmdBuffer.size() == 1) { graph->markAllExtern(); continue; } if (cmdBuffer[0] == "endgraph" && cmdBuffer.size() == 1) { solver.addGraph(graphId, *graph); delete graph; graph = NULL; continue; } } else { if (cmdBuffer[0] == "graph" && cmdBuffer.size() == 2) { graph = new SubCircuit::Graph; graphId = cmdBuffer[1]; continue; } if (cmdBuffer[0] == "compatible" && cmdBuffer.size() == 3) { solver.addCompatibleTypes(cmdBuffer[1], cmdBuffer[2]); continue; } if (cmdBuffer[0] == "constcompat" && cmdBuffer.size() == 3) { int needleConstValue = cmdBuffer[1].size() > 1 && cmdBuffer[1][0] == '#' ? atoi(cmdBuffer[1].c_str()+1) : cmdBuffer[1][0]; int haystackConstValue = cmdBuffer[2].size() > 1 && cmdBuffer[2][0] == '#' ? atoi(cmdBuffer[2].c_str()+1) : cmdBuffer[2][0]; solver.addCompatibleConstants(needleConstValue, haystackConstValue); continue; } if (cmdBuffer[0] == "swapgroup" && cmdBuffer.size() >= 4) { std::set ports; for (int i = 2; i < int(cmdBuffer.size()); i++) ports.insert(cmdBuffer[i]); solver.addSwappablePorts(cmdBuffer[1], ports); continue; } if (cmdBuffer[0] == "swapperm" && cmdBuffer.size() >= 4 && cmdBuffer.size() % 2 == 1 && cmdBuffer[cmdBuffer.size()/2 + 1] == ":") { std::map portMapping; int n = (cmdBuffer.size()-3) / 2; for (int i = 0; i < n; i++) portMapping[cmdBuffer[i+2]] = cmdBuffer[i+3+n]; solver.addSwappablePortsPermutation(cmdBuffer[1], portMapping); continue; } if (cmdBuffer[0] == "initmap" && cmdBuffer.size() >= 4) { for (int i = 2; i < int(cmdBuffer.size()); i++) initialMappings[cmdBuffer[1]].insert(cmdBuffer[i]); continue; } if (cmdBuffer[0] == "solve" && 3 <= cmdBuffer.size() && cmdBuffer.size() <= 5) { bool allowOverlap = true; int maxSolutions = -1; if (cmdBuffer.size() >= 4) allowOverlap 
module testbench ();

reg             clk = 0;
reg             rst = 1;
reg             req3 = 0;
reg             req2 = 0;
reg             req1 = 0;
reg             req0 = 0;
wire            gnt3;   
wire            gnt2;   
wire            gnt1;   
wire            gnt0;  

// Clock generator
always #1 clk = ~clk;
integer file;

always @(posedge clk)
  $fdisplay(file, "%b", {gnt3, gnt2, gnt1, gnt0});

initial begin
  file = $fopen(`outfile);
  repeat (5) @ (posedge clk);
  rst <= 0;
  repeat (1) @ (posedge clk);
  req0 <= 1;
  repeat (1) @ (posedge clk);
  req0 <= 0;
  repeat (1) @ (posedge clk);
  req0 <= 1;
  req1 <= 1;
  repeat (1) @ (posedge clk);
  req2 <= 1;
  req1 <= 0;
  repeat (1) @ (posedge clk);
  req3 <= 1;
  req2 <= 0;
  repeat (1) @ (posedge clk);
  req3 <= 0;
  repeat (1) @ (posedge clk);
  req0 <= 0;
  repeat (1) @ (posedge clk);
  #10 $finish;
end 

// Connect the DUT
arbiter U (
 clk,    
 rst,    
 req3,   
 req2,   
 req1,   
 req0,   
 gnt3,   
 gnt2,   
 gnt1,   
 gnt0   
);

endmodule
generated by cgit v1.2.3 (git 2.25.1) at 2025-09-03 11:14:09 +0000