read_verilog << EOT module ibuf ((* iopad_external_pin *) input i, output o); endmodule module obuf (input i, (* iopad_external_pin *) output o); endmodule module obuft (input i, input oe, (* iopad_external_pin *) output o); endmodule module iobuf (input i, input oe, output o, (* iopad_external_pin *) inout io); endmodule module buf_inside (input i, output o); obuf b (.i(i), .o(o)); endmodule module a(input i, output o); assign o = i; endmodule module b(input i, output o); ibuf b (.i(i), .o(o)); endmodule module c(input i, output o); obuf b (.i(i), .o(o)); endmodule module d(input i, oe, output o, o2, o3); assign o = oe ? i : 1'bz; assign o2 = o; assign o3 = ~o; endmodule module e(input i, oe, inout io, output o2, o3); assign io = oe ? i : 1'bz; assign o2 = io; assign o3 = ~io; endmodule module f(output o, o2); assign o = 1'bz; endmodule module g(inout io, output o); assign o = io; endmodule module h(inout io, output o, input i); assign io = i; assign o = io; endmodule module i(input i, output o); buf_inside b (.i(i), .o(o)); endmodule module j(input i, output o); wire tmp; obuf b (.i(i), .o(tmp)); assign o = tmp; endmodule module k(inout o, o2); assign o = 1'bz; endmodule EOT opt_clean tribuf simplemap iopadmap -bits -inpad ibuf o:i -outpad obuf i:o -toutpad obuft oe:i:o -tinoutpad iobuf oe:o:i:io a b c d e f g h i j k opt_clean hierarchy -check check select -assert-count 1 a/t:ibuf select -assert-count 1 a/t:obuf select -set ib w:i %a %co a/t:ibuf %i select -set ob w:o %a %ci a/t:obuf %i select -assert-count 1 @ib select -assert-count 1 @ob select -assert-count 1 @ib %co %co @ob %i select -assert-count 1 b/t:ibuf select -assert-count 1 b/t:obuf select -set ib w:i %a %co b/t:ibuf %i select -set ob w:o %a %ci b/t:obuf %i select -assert-count 1 @ib select -assert-count 1 @ob select -assert-count 1 @ib %co %co @ob %i select -assert-count 1 c/t:ibuf select -assert-count 1 c/t:obuf select -set ib w:i %a %co c/t:ibuf %i select -set ob w:o %a %ci c/t:obuf %i select -assert-count 1 @ib select -assert-count 1 @ob select -assert-count 1 @ib %co %co @ob %i select -assert-count 2 d/t:ibuf select -assert-count 2 d/t:obuf select -assert-count 1 d/t:obuft select -set ib w:i %a %co d/t:ibuf %i select -set oeb w:oe %a %co d/t:ibuf %i select -set ob w:o %a %ci d/t:obuft %i select -set o2b w:o2 %a %ci d/t:obuf %i select -set o3b w:o3 %a %ci d/t:obuf %i select -assert-count 1 @ib select -assert-count 1 @oeb select -assert-count 1 @ob select -assert-count 1 @o2b select -assert-count 1 @o3b select -assert-count 1 @ib %co %co @ob %i select -assert-count 1 @oeb %co %co @ob %i select -assert-count 1 @ib %co %co @o2b %i select -assert-count 1 @ib %co %co t:$_NOT_ %i select -assert-count 1 @o3b %ci %ci t:$_NOT_ %i select -assert-count 2 e/t:ibuf select -assert-count 2 e/t:obuf select -assert-count 1 e/t:iobuf select -set ib w:i %a %co e/t:ibuf %i select -set oeb w:oe %a %co e/t:ibuf %i select -set iob w:io %a %ci e/t:iobuf %i select -set o2b w:o2 %a %ci e/t:obuf %i select -set o3b w:o3 %a %ci e/t:obuf %i select -assert-count 1 @ib select -assert-count 1 @oeb select -assert-count 1 @iob select -assert-count 1 @o2b select -assert-count 1 @o3b select -assert-count 1 @ib %co %co @iob %i select -assert-count 1 @oeb %co %co @iob %i select -assert-count 1 @iob %co %co @o2b %i select -assert-count 1 @iob %co %co t:$_NOT_ %i select -assert-count 1 @o3b %ci %ci t:$_NOT_ %i select -assert-count 2 f/t:obuft select -assert-count 1 g/t:obuf select -assert-count 1 g/t:iobuf select -assert-count 1 h/t:ibuf select -assert-count 1 h/t:iobuf select -assert-count 1 h/t:obuf select -assert-count 1 i/t:ibuf select -assert-count 0 i/t:obuf select -assert-count 1 j/t:ibuf select -assert-count 1 j/t:obuf select -assert-count 2 k/t:iobuf # Check that \init attributes get moved from output buffer # to buffer input design -reset read_verilog << EOT module obuf (input i, (* iopad_external_pin *) output o); endmodule module obuft (input i, input oe, (* iopad_external_pin *) output o); endmodule module iobuf (input i, input oe, output o, (* iopad_external_pin *) inout io); endmodule module sub(input i, output o); endmodule module a(input i, (* init=1'b1 *) output o); sub s(.i(i), .o(o)); endmodule module b(input [1:0] i, oe, (* init=2'b1x *) output [1:0] o); wire [1:0] w; sub s1(.i(i[0]), .o(w[0])); sub s2(.i(i[1]), .o(w[1])); assign o = oe ? w : 2'bz; endmodule module c(input i, oe, (* init=2'b00 *) inout io, output o1, o2); assign io = oe ? i : 1'bz; assign {o1,o2} = {io,io}; endmodule EOT opt_clean tribuf simplemap iopadmap -bits -outpad obuf i:o -toutpad obuft oe:i:o -tinoutpad iobuf oe:o:i:io select -assert-count 1 a/c:s %co a/a:init=1'b1 %i select -assert-count 1 a/a:init select -assert-count 1 b/c:s* %co %a b/a:init=2'b1x %i select -assert-count 1 b/a:init select -assert-count 1 c/t:iobuf %co c/a:init=2'b00 %i select -assert-count 1 c/a:init '#n5'>5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89
From aa705c1b0860da91f2ed1a4c0b57337e6de689e1 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Thu, 7 Aug 2014 18:55:31 +0200
Subject: [PATCH 17/36] MTD: xway: fix nand locking

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/mtd/nand/xway_nand.c |   15 +++------------
 1 file changed, 3 insertions(+), 12 deletions(-)

--- a/drivers/mtd/nand/xway_nand.c
+++ b/drivers/mtd/nand/xway_nand.c
@@ -80,13 +80,16 @@ static void xway_reset_chip(struct nand_
 
 static void xway_select_chip(struct mtd_info *mtd, int chip)
 {
+	static unsigned long csflags;
 
 	switch (chip) {
 	case -1:
 		ltq_ebu_w32_mask(NAND_CON_CE, 0, EBU_NAND_CON);
 		ltq_ebu_w32_mask(NAND_CON_NANDM, 0, EBU_NAND_CON);
+		spin_unlock_irqrestore(&ebu_lock, csflags);
 		break;
 	case 0:
+		spin_lock_irqsave(&ebu_lock, csflags);
 		ltq_ebu_w32_mask(0, NAND_CON_NANDM, EBU_NAND_CON);
 		ltq_ebu_w32_mask(0, NAND_CON_CE, EBU_NAND_CON);
 		break;
@@ -99,7 +102,6 @@ static void xway_cmd_ctrl(struct mtd_inf
 {
 	struct nand_chip *this = mtd->priv;
 	unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
-	unsigned long flags;
 
 	if (ctrl & NAND_CTRL_CHANGE) {
 		if (ctrl & NAND_CLE)
@@ -109,11 +111,9 @@ static void xway_cmd_ctrl(struct mtd_inf
 	}
 
 	if (cmd != NAND_CMD_NONE) {
-		spin_lock_irqsave(&ebu_lock, flags);
 		writeb(cmd, (void __iomem *) (nandaddr | xway_latchcmd));
 		while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
 			;
-		spin_unlock_irqrestore(&ebu_lock, flags);
 	}
 }
 
@@ -126,12 +126,9 @@ static unsigned char xway_read_byte(stru
 {
 	struct nand_chip *this = mtd->priv;
 	unsigned long nandaddr = (unsigned long) this->IO_ADDR_R;
-	unsigned long flags;
 	int ret;
 
-	spin_lock_irqsave(&ebu_lock, flags);
 	ret = ltq_r8((void __iomem *)(nandaddr | NAND_READ_DATA));
-	spin_unlock_irqrestore(&ebu_lock, flags);
 
 	return ret;
 }
@@ -140,26 +137,20 @@ static void xway_read_buf(struct mtd_inf
 {
 	struct nand_chip *this = mtd->priv;
 	unsigned long nandaddr = (unsigned long) this->IO_ADDR_R;
-	unsigned long flags;
 	int i;
 
-	spin_lock_irqsave(&ebu_lock, flags);
 	for (i = 0; i < len; i++)
 		buf[i] = ltq_r8((void __iomem *)(nandaddr | NAND_READ_DATA));
-	spin_unlock_irqrestore(&ebu_lock, flags);
 }
 
 static void xway_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
 {
 	struct nand_chip *this = mtd->priv;
 	unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
-	unsigned long flags;
 	int i;
 
-	spin_lock_irqsave(&ebu_lock, flags);
 	for (i = 0; i < len; i++)
 		ltq_w8(buf[i], (void __iomem *)(nandaddr | NAND_WRITE_DATA));
-	spin_unlock_irqrestore(&ebu_lock, flags);
 }
 
 static int xway_nand_probe(struct platform_device *pdev)