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module adffe( input d, clk, rst, en, output reg q ); always @( posedge clk, posedge rst ) if (rst) q <= 0; else if (en) q <= d; endmodule Atom feed' href='http://git.panaceas.org/cgit/iCE40/yosys/atom/tests/sva/.gitignore?h=master' type='application/atom+xml'/>