From 7ec740b7ad4ee4bc02e2564671e0153cdd08152f Mon Sep 17 00:00:00 2001 From: whitequark Date: Fri, 7 Dec 2018 17:13:52 +0000 Subject: opt_lut: leave intact LUTs with cascade feeding module outputs. --- tests/opt/opt_lut_port.il | 18 ++++++++++++++++++ tests/opt/opt_lut_port.ys | 2 ++ 2 files changed, 20 insertions(+) create mode 100644 tests/opt/opt_lut_port.il create mode 100644 tests/opt/opt_lut_port.ys (limited to 'tests') diff --git a/tests/opt/opt_lut_port.il b/tests/opt/opt_lut_port.il new file mode 100644 index 000000000..7eb71890f --- /dev/null +++ b/tests/opt/opt_lut_port.il @@ -0,0 +1,18 @@ +module $1 + wire width 4 input 2 \_0_ + wire output 4 \_1_ + wire input 3 \_2_ + wire output 1 \o + cell $lut \_3_ + parameter \LUT 16'0011000000000011 + parameter \WIDTH 4 + connect \A { \_0_ [3] \o 2'00 } + connect \Y \_1_ + end + cell $lut \_4_ + parameter \LUT 4'0001 + parameter \WIDTH 4 + connect \A { 3'000 \_2_ } + connect \Y \o + end +end diff --git a/tests/opt/opt_lut_port.ys b/tests/opt/opt_lut_port.ys new file mode 100644 index 000000000..51dfd988b --- /dev/null +++ b/tests/opt/opt_lut_port.ys @@ -0,0 +1,2 @@ +read_ilang opt_lut_port.il +select -assert-count 2 t:$lut -- cgit v1.2.3