From 977262c8033b8778a32d4f29a77c64ea5a2799bd Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 13 Feb 2020 12:13:12 -0800 Subject: Update simple_abc9 tests --- tests/simple_abc9/abc.box | 2 -- tests/simple_abc9/abc9.v | 7 ++++++- tests/simple_abc9/run-test.sh | 4 ++-- 3 files changed, 8 insertions(+), 5 deletions(-) delete mode 100644 tests/simple_abc9/abc.box (limited to 'tests') diff --git a/tests/simple_abc9/abc.box b/tests/simple_abc9/abc.box deleted file mode 100644 index a8801d807..000000000 --- a/tests/simple_abc9/abc.box +++ /dev/null @@ -1,2 +0,0 @@ -MUXF8 1 0 3 1 -1 1 1 diff --git a/tests/simple_abc9/abc9.v b/tests/simple_abc9/abc9.v index e5837d480..688b47586 100644 --- a/tests/simple_abc9/abc9.v +++ b/tests/simple_abc9/abc9.v @@ -213,8 +213,13 @@ module arbiter (clk, rst, request, acknowledge, grant, grant_valid, grant_encode input rst; endmodule -(* abc9_box_id=1, whitebox *) +(* abc9_box, blackbox *) module MUXF8(input I0, I1, S, output O); +specify + (I0 => O) = 0; + (I1 => O) = 0; + (S => O) = 0; +endspecify endmodule // Citation: https://github.com/alexforencich/verilog-ethernet diff --git a/tests/simple_abc9/run-test.sh b/tests/simple_abc9/run-test.sh index 32d7a80ca..424d8f417 100755 --- a/tests/simple_abc9/run-test.sh +++ b/tests/simple_abc9/run-test.sh @@ -25,8 +25,8 @@ exec ${MAKE:-make} -f ../tools/autotest.mk $seed *.v *.sv EXTRA_FLAGS="-n 300 -p synth -run coarse; \ opt -full; \ techmap; \ - abc9 -lut 4 -box ../abc.box; \ + abc9 -lut 4; \ clean; \ check -assert; \ select -assert-none t:${DOLLAR}_NOT_ t:${DOLLAR}_AND_ %%; \ - setattr -mod -unset whitebox'" + setattr -mod -unset blackbox'" -- cgit v1.2.3 From bc97e64b211ea4ff99afde7cd1f130b1b3261848 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 14 Feb 2020 10:31:38 -0800 Subject: Fix tests/arch/xilinx/fsm.ys to count flops only --- tests/arch/xilinx/fsm.ys | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) (limited to 'tests') diff --git a/tests/arch/xilinx/fsm.ys b/tests/arch/xilinx/fsm.ys index fec4c6082..70c05f2c0 100644 --- a/tests/arch/xilinx/fsm.ys +++ b/tests/arch/xilinx/fsm.ys @@ -15,10 +15,7 @@ stat select -assert-count 1 t:BUFG select -assert-count 4 t:FDRE select -assert-count 1 t:FDSE -select -assert-count 1 t:LUT2 -select -assert-count 3 t:LUT5 -select -assert-count 1 t:LUT6 -select -assert-none t:BUFG t:FDRE t:FDSE t:LUT2 t:LUT5 t:LUT6 %% t:* %D +select -assert-none t:BUFG t:FDRE t:FDSE t:LUT* %% t:* %D design -load orig @@ -31,8 +28,5 @@ cd fsm # Constrain all select calls below inside the top module stat select -assert-count 1 t:BUFG select -assert-count 6 t:FDRE -select -assert-count 1 t:LUT1 -select -assert-count 3 t:LUT3 -select -assert-count 6 t:LUT4 -select -assert-count 6 t:MUXF5 -select -assert-none t:BUFG t:FDRE t:LUT1 t:LUT3 t:LUT4 t:MUXF5 %% t:* %D +# FIXME: One more register than above? +select -assert-none t:BUFG t:FDRE t:LUT* t:MUXF* %% t:* %D -- cgit v1.2.3 From 717fb492b35a93ae78e33f742d8c3d493be7e4e8 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sat, 15 Feb 2020 08:27:41 -0800 Subject: Update bug1630.ys to use -lut 4 instead of lut file --- tests/arch/ecp5/bug1630.ys | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'tests') diff --git a/tests/arch/ecp5/bug1630.ys b/tests/arch/ecp5/bug1630.ys index b419fb9bb..63df1ad5b 100644 --- a/tests/arch/ecp5/bug1630.ys +++ b/tests/arch/ecp5/bug1630.ys @@ -1,2 +1,2 @@ read_ilang bug1630.il.gz -abc9 -lut +/ecp5/abc9_5g.lut +abc9 -lut 4 -- cgit v1.2.3 From f858219c4ed18fb5886641efd1e71f5aad0b1c84 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sat, 15 Feb 2020 08:29:10 -0800 Subject: Cleanup tests --- tests/arch/xilinx/bug1480.ys | 18 ++++++++++++++++++ tests/various/bug1480.ys | 18 ------------------ tests/various/pmux2shiftx.v | 2 +- 3 files changed, 19 insertions(+), 19 deletions(-) create mode 100644 tests/arch/xilinx/bug1480.ys delete mode 100644 tests/various/bug1480.ys (limited to 'tests') diff --git a/tests/arch/xilinx/bug1480.ys b/tests/arch/xilinx/bug1480.ys new file mode 100644 index 000000000..84faea08a --- /dev/null +++ b/tests/arch/xilinx/bug1480.ys @@ -0,0 +1,18 @@ +read_verilog << EOF +module top(...); + +input signed [17:0] A; +input signed [17:0] B; +output X; +output Y; + +wire [35:0] P; +assign P = A * B; + +assign X = P[0]; +assign Y = P[35]; + +endmodule +EOF + +synth_xilinx diff --git a/tests/various/bug1480.ys b/tests/various/bug1480.ys deleted file mode 100644 index 84faea08a..000000000 --- a/tests/various/bug1480.ys +++ /dev/null @@ -1,18 +0,0 @@ -read_verilog << EOF -module top(...); - -input signed [17:0] A; -input signed [17:0] B; -output X; -output Y; - -wire [35:0] P; -assign P = A * B; - -assign X = P[0]; -assign Y = P[35]; - -endmodule -EOF - -synth_xilinx diff --git a/tests/various/pmux2shiftx.v b/tests/various/pmux2shiftx.v index 563394080..c1994e92c 100644 --- a/tests/various/pmux2shiftx.v +++ b/tests/various/pmux2shiftx.v @@ -33,7 +33,7 @@ module pmux2shiftx_test ( end endmodule -module issue01135(input [7:0] i, output o); +module issue01135(input [7:0] i, output reg o); always @* case (i[6:3]) 4: o <= i[0]; -- cgit v1.2.3 From a179d918ec4e5ed595e8f556b159ab39679d4e6c Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 19 Feb 2020 09:47:36 -0800 Subject: Revert "Fix tests/arch/xilinx/fsm.ys to count flops only" This reverts commit 68f903c6dd7403a4cf280cf71ee02d20345938b5. --- tests/arch/xilinx/fsm.ys | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'tests') diff --git a/tests/arch/xilinx/fsm.ys b/tests/arch/xilinx/fsm.ys index 70c05f2c0..fec4c6082 100644 --- a/tests/arch/xilinx/fsm.ys +++ b/tests/arch/xilinx/fsm.ys @@ -15,7 +15,10 @@ stat select -assert-count 1 t:BUFG select -assert-count 4 t:FDRE select -assert-count 1 t:FDSE -select -assert-none t:BUFG t:FDRE t:FDSE t:LUT* %% t:* %D +select -assert-count 1 t:LUT2 +select -assert-count 3 t:LUT5 +select -assert-count 1 t:LUT6 +select -assert-none t:BUFG t:FDRE t:FDSE t:LUT2 t:LUT5 t:LUT6 %% t:* %D design -load orig @@ -28,5 +31,8 @@ cd fsm # Constrain all select calls below inside the top module stat select -assert-count 1 t:BUFG select -assert-count 6 t:FDRE -# FIXME: One more register than above? -select -assert-none t:BUFG t:FDRE t:LUT* t:MUXF* %% t:* %D +select -assert-count 1 t:LUT1 +select -assert-count 3 t:LUT3 +select -assert-count 6 t:LUT4 +select -assert-count 6 t:MUXF5 +select -assert-none t:BUFG t:FDRE t:LUT1 t:LUT3 t:LUT4 t:MUXF5 %% t:* %D -- cgit v1.2.3