From fce8dc7db20d722646cea83ca841160d3d07445e Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Tue, 20 Aug 2019 20:05:16 -0700 Subject: Add test --- tests/techmap/recursive.v | 8 ++++++++ tests/techmap/recursive_map.v | 4 ++++ tests/techmap/recursive_runtest.sh | 3 +++ 3 files changed, 15 insertions(+) create mode 100644 tests/techmap/recursive.v create mode 100644 tests/techmap/recursive_map.v create mode 100644 tests/techmap/recursive_runtest.sh (limited to 'tests/techmap') diff --git a/tests/techmap/recursive.v b/tests/techmap/recursive.v new file mode 100644 index 000000000..d281b21d8 --- /dev/null +++ b/tests/techmap/recursive.v @@ -0,0 +1,8 @@ +module top; +sub s0(); +foo f0(); +endmodule + +module foo; +sub s0(); +endmodule diff --git a/tests/techmap/recursive_map.v b/tests/techmap/recursive_map.v new file mode 100644 index 000000000..934256552 --- /dev/null +++ b/tests/techmap/recursive_map.v @@ -0,0 +1,4 @@ +module sub; + sub _TECHMAP_REPLACE_ (); + bar f0(); +endmodule diff --git a/tests/techmap/recursive_runtest.sh b/tests/techmap/recursive_runtest.sh new file mode 100644 index 000000000..30c79bf03 --- /dev/null +++ b/tests/techmap/recursive_runtest.sh @@ -0,0 +1,3 @@ +set -ev + +../../yosys -p 'hierarchy -top top; techmap -map recursive_map.v -max_iter 1; select -assert-count 2 t:sub; select -assert-count 2 t:bar' recursive.v -- cgit v1.2.3 From d62c10d641c5af4b1d395caa042681788df1aae4 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 23 Aug 2019 11:09:50 -0700 Subject: tests/techmap/run-test.sh to cope with *.ys --- tests/techmap/.gitignore | 1 + tests/techmap/run-test.sh | 24 +++++++++++++++++------- 2 files changed, 18 insertions(+), 7 deletions(-) (limited to 'tests/techmap') diff --git a/tests/techmap/.gitignore b/tests/techmap/.gitignore index 397b4a762..cfed22fc5 100644 --- a/tests/techmap/.gitignore +++ b/tests/techmap/.gitignore @@ -1 +1,2 @@ *.log +/*.mk diff --git a/tests/techmap/run-test.sh b/tests/techmap/run-test.sh index e2fc11e52..96489ff15 100755 --- a/tests/techmap/run-test.sh +++ b/tests/techmap/run-test.sh @@ -1,10 +1,20 @@ -#!/bin/bash +#!/usr/bin/env bash set -e -for x in *_runtest.sh; do - echo "Running $x.." - if ! bash $x &> ${x%.sh}.log; then - tail ${x%.sh}.log - echo ERROR - exit 1 +{ +echo "all::" +for x in *.ys; do + echo "all:: run-$x" + echo "run-$x:" + echo " @echo 'Running $x..'" + echo " @../../yosys -ql ${x%.ys}.log $x" +done +for s in *.sh; do + if [ "$s" != "run-test.sh" ]; then + echo "all:: run-$s" + echo "run-$s:" + echo " @echo 'Running $s..'" + echo " @bash $s > ${s%.sh}.log 2>&1" fi done +} > run-test.mk +exec ${MAKE:-make} -f run-test.mk -- cgit v1.2.3 From 5628e2ec53c3a1d5f1828b8f522c5c09c9856b0d Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 23 Aug 2019 11:10:02 -0700 Subject: Add simple clkbufmap tests --- tests/techmap/clkbufmap.ys | 52 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 tests/techmap/clkbufmap.ys (limited to 'tests/techmap') diff --git a/tests/techmap/clkbufmap.ys b/tests/techmap/clkbufmap.ys new file mode 100644 index 000000000..eb8970af4 --- /dev/null +++ b/tests/techmap/clkbufmap.ys @@ -0,0 +1,52 @@ +read_verilog < Date: Fri, 23 Aug 2019 11:15:26 -0700 Subject: Check clkbuf_inhibit=1 is ignored for custom selection --- tests/techmap/clkbufmap.ys | 1 + 1 file changed, 1 insertion(+) (limited to 'tests/techmap') diff --git a/tests/techmap/clkbufmap.ys b/tests/techmap/clkbufmap.ys index eb8970af4..46ff4d694 100644 --- a/tests/techmap/clkbufmap.ys +++ b/tests/techmap/clkbufmap.ys @@ -35,6 +35,7 @@ select -assert-count 1 t:clkbuf # ---------------------- design -load ref +setattr -set clkbuf_inhibit 1 w:clk1 setattr -set buffer_type "bufg" w:clk2 clkbufmap -buf clkbuf o:i w:* a:buffer_type=none a:buffer_type=bufr %u %d select -assert-count 1 w:clk1 %a %co t:clkbuf %i -- cgit v1.2.3 From 528f1c86877d247700bd9445e03c85b3eb437b5c Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 26 Aug 2019 13:45:16 -0700 Subject: Improve tests to check that clkbuf is connected to expected --- tests/techmap/clkbufmap.ys | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) (limited to 'tests/techmap') diff --git a/tests/techmap/clkbufmap.ys b/tests/techmap/clkbufmap.ys index 46ff4d694..5847c3ce5 100644 --- a/tests/techmap/clkbufmap.ys +++ b/tests/techmap/clkbufmap.ys @@ -18,9 +18,15 @@ design -save ref design -load ref clkbufmap -buf clkbuf o:i -select -assert-count 1 w:clk1 %a %co t:clkbuf %i -select -assert-count 1 w:clk2 %a %co t:clkbuf %i select -assert-count 2 t:clkbuf +select -set clk1 w:clk1 %a %co t:clkbuf %i # Find 'clk1' fanouts that are 'clkbuf' +select -assert-count 1 @clk1 # Check there is one such fanout +select -assert-count 1 @clk1 %x:+[o] %co c:s* %i # Check that the 'o' of that clkbuf drives one fanout +select -assert-count 1 @clk1 %x:+[o] %co c:s0 %i # And that one fanout is 's0' +select -set clk2 w:clk2 %a %co t:clkbuf %i +select -assert-count 1 @clk2 +select -assert-count 1 @clk2 %x:+[o] %co c:s* %i +select -assert-count 1 @clk2 %x:+[o] %co c:s1 %i # ---------------------- @@ -28,9 +34,12 @@ design -load ref setattr -set clkbuf_inhibit 0 w:clk1 setattr -set clkbuf_inhibit 1 w:clk2 clkbufmap -buf clkbuf o:i -select -assert-count 1 w:clk1 %a %co t:clkbuf %i -select -assert-count 0 w:clk2 %a %co t:clkbuf %i select -assert-count 1 t:clkbuf +select -set clk1 w:clk1 %a %co t:clkbuf %i # Find 'clk1' fanouts that are 'clkbuf' +select -assert-count 1 @clk1 # Check there is one such fanout +select -assert-count 1 @clk1 %x:+[o] %co c:s* %i # Check that the 'o' of that clkbuf drives one fanout +select -assert-count 1 @clk1 %x:+[o] %co c:s0 %i # And that one fanout is 's0' +select -assert-count 0 w:clk2 %a %co t:clkbuf %i # ---------------------- @@ -38,9 +47,15 @@ design -load ref setattr -set clkbuf_inhibit 1 w:clk1 setattr -set buffer_type "bufg" w:clk2 clkbufmap -buf clkbuf o:i w:* a:buffer_type=none a:buffer_type=bufr %u %d -select -assert-count 1 w:clk1 %a %co t:clkbuf %i -select -assert-count 1 w:clk2 %a %co t:clkbuf %i select -assert-count 2 t:clkbuf +select -set clk1 w:clk1 %a %co t:clkbuf %i # Find 'clk1' fanouts that are 'clkbuf' +select -assert-count 1 @clk1 # Check there is one such fanout +select -assert-count 1 @clk1 %x:+[o] %co c:s* %i # Check that the 'o' of that clkbuf drives one fanout +select -assert-count 1 @clk1 %x:+[o] %co c:s0 %i # And that one fanout is 's0' +select -set clk2 w:clk2 %a %co t:clkbuf %i # Find 'clk1' fanouts that are 'clkbuf' +select -assert-count 1 @clk2 # Check there is one such fanout +select -assert-count 1 @clk2 %x:+[o] %co c:s* %i # Check that the 'o' of that clkbuf drives one fanout +select -assert-count 1 @clk2 %x:+[o] %co c:s1 %i # And that one fanout is 's0' # ---------------------- -- cgit v1.2.3 From 5fb4b12cb50b870b546d76f9c702678d8f0aa60a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marcin=20Ko=C5=9Bcielnicki?= Date: Tue, 27 Aug 2019 17:26:47 +0200 Subject: improve clkbuf_inhibit propagation upwards through hierarchy --- tests/techmap/clkbufmap.ys | 38 +++++++++++++++++++++++++++++++++----- 1 file changed, 33 insertions(+), 5 deletions(-) (limited to 'tests/techmap') diff --git a/tests/techmap/clkbufmap.ys b/tests/techmap/clkbufmap.ys index 5847c3ce5..f1277864e 100644 --- a/tests/techmap/clkbufmap.ys +++ b/tests/techmap/clkbufmap.ys @@ -3,11 +3,26 @@ module clkbuf (input i, (* clkbuf_driver *) output o); endmodule module dff ((* clkbuf_sink *) input clk, input d, output q); endmodule module dffe ((* clkbuf_sink *) input c, input d, e, output q); endmodule module latch (input e, d, output q); endmodule +module clkgen (output o); endmodule -module top(input clk1, clk2, clk3, d, e, output [2:0] q); +module top(input clk1, clk2, clk3, d, e, output [4:0] q); +wire clk4, clk5, clk6; dff s0 (.clk(clk1), .d(d), .q(q[0])); dffe s1 (.c(clk2), .d(d), .e(e), .q(q[1])); latch s2 (.e(clk3), .d(d), .q(q[2])); +sub s3 (.sclk4(clk4), .sclk5(clk5), .sclk6(clk6), .sd(d), .sq(q[3])); +dff s4 (.clk(clk4), .d(d), .q(q[4])); +dff s5 (.clk(clk5), .d(d), .q(q[4])); +dff s6 (.clk(clk6), .d(d), .q(q[4])); +endmodule + +module sub(output sclk4, output sclk5, output sclk6, input sd, output sq); +wire tmp; +clkgen s7(.o(sclk4)); +clkgen s8(.o(sclk5)); +clkgen s9(.o(tmp)); +clkbuf s10(.i(tmp), .o(sclk6)); +dff s11(.clk(sclk4), .d(sd), .q(sq)); endmodule EOT @@ -18,7 +33,8 @@ design -save ref design -load ref clkbufmap -buf clkbuf o:i -select -assert-count 2 t:clkbuf +select -assert-count 3 top/t:clkbuf +select -assert-count 2 sub/t:clkbuf select -set clk1 w:clk1 %a %co t:clkbuf %i # Find 'clk1' fanouts that are 'clkbuf' select -assert-count 1 @clk1 # Check there is one such fanout select -assert-count 1 @clk1 %x:+[o] %co c:s* %i # Check that the 'o' of that clkbuf drives one fanout @@ -27,6 +43,14 @@ select -set clk2 w:clk2 %a %co t:clkbuf %i select -assert-count 1 @clk2 select -assert-count 1 @clk2 %x:+[o] %co c:s* %i select -assert-count 1 @clk2 %x:+[o] %co c:s1 %i +select -set clk5 w:clk5 %a %ci t:clkbuf %i +select -assert-count 1 @clk5 +select -assert-count 1 @clk5 %x:+[o] %co c:s5 %i +select -assert-count 1 @clk5 %x:+[i] %ci c:s3 %i +select -set sclk4 w:sclk4 %a %ci t:clkbuf %i +select -assert-count 1 @sclk4 +select -assert-count 1 @sclk4 %x:+[o] %co c:s11 %i +select -assert-count 1 @sclk4 %x:+[i] %ci c:s7 %i # ---------------------- @@ -34,7 +58,7 @@ design -load ref setattr -set clkbuf_inhibit 0 w:clk1 setattr -set clkbuf_inhibit 1 w:clk2 clkbufmap -buf clkbuf o:i -select -assert-count 1 t:clkbuf +select -assert-count 2 top/t:clkbuf select -set clk1 w:clk1 %a %co t:clkbuf %i # Find 'clk1' fanouts that are 'clkbuf' select -assert-count 1 @clk1 # Check there is one such fanout select -assert-count 1 @clk1 %x:+[o] %co c:s* %i # Check that the 'o' of that clkbuf drives one fanout @@ -47,7 +71,8 @@ design -load ref setattr -set clkbuf_inhibit 1 w:clk1 setattr -set buffer_type "bufg" w:clk2 clkbufmap -buf clkbuf o:i w:* a:buffer_type=none a:buffer_type=bufr %u %d -select -assert-count 2 t:clkbuf +select -assert-count 3 top/t:clkbuf +select -assert-count 2 sub/t:clkbuf select -set clk1 w:clk1 %a %co t:clkbuf %i # Find 'clk1' fanouts that are 'clkbuf' select -assert-count 1 @clk1 # Check there is one such fanout select -assert-count 1 @clk1 %x:+[o] %co c:s* %i # Check that the 'o' of that clkbuf drives one fanout @@ -62,7 +87,10 @@ select -assert-count 1 @clk2 %x:+[o] %co c:s1 %i # And that one fanout is 's0 design -load ref setattr -set buffer_type "none" w:clk1 setattr -set buffer_type "bufr" w:clk2 +setattr -set buffer_type "bufr" w:sclk4 +setattr -set buffer_type "bufr" w:sclk5 clkbufmap -buf clkbuf o:i w:* a:buffer_type=none a:buffer_type=bufr %u %d select -assert-count 0 w:clk1 %a %co t:clkbuf %i select -assert-count 0 w:clk2 %a %co t:clkbuf %i -select -assert-count 0 t:clkbuf +select -assert-count 0 top/t:clkbuf +select -assert-count 1 sub/t:clkbuf -- cgit v1.2.3 From a82e8df7d37c02258d36223bb16833331dc8808e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marcin=20Ko=C5=9Bcielnicki?= Date: Fri, 16 Aug 2019 03:14:03 +0000 Subject: techmap: Add support for extracting init values of ports --- tests/techmap/wireinit.ys | 98 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 98 insertions(+) create mode 100644 tests/techmap/wireinit.ys (limited to 'tests/techmap') diff --git a/tests/techmap/wireinit.ys b/tests/techmap/wireinit.ys new file mode 100644 index 000000000..1396839fe --- /dev/null +++ b/tests/techmap/wireinit.ys @@ -0,0 +1,98 @@ +read_verilog < Date: Tue, 10 Sep 2019 16:31:50 +0000 Subject: Add -match-init option to dff2dffs. --- tests/techmap/dff2dffs.ys | 50 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 tests/techmap/dff2dffs.ys (limited to 'tests/techmap') diff --git a/tests/techmap/dff2dffs.ys b/tests/techmap/dff2dffs.ys new file mode 100644 index 000000000..13f1a3cf3 --- /dev/null +++ b/tests/techmap/dff2dffs.ys @@ -0,0 +1,50 @@ +read_verilog << EOT +module top(...); +input clk; +input d; +input sr; +output reg q0, q1, q2, q3, q4, q5; + +initial q0 = 1'b0; +initial q1 = 1'b0; +initial q2 = 1'b1; +initial q3 = 1'b1; +initial q4 = 1'bx; +initial q5 = 1'bx; + +always @(posedge clk) begin + q0 <= sr ? 1'b0 : d; + q1 <= sr ? 1'b1 : d; + q2 <= sr ? 1'b0 : d; + q3 <= sr ? 1'b1 : d; + q4 <= sr ? 1'b0 : d; + q5 <= sr ? 1'b1 : d; +end + +endmodule +EOT + +proc +simplemap +design -save ref + +dff2dffs +clean + +select -assert-count 1 w:q0 %x t:$__DFFS_PP0_ %i +select -assert-count 1 w:q1 %x t:$__DFFS_PP1_ %i +select -assert-count 1 w:q2 %x t:$__DFFS_PP0_ %i +select -assert-count 1 w:q3 %x t:$__DFFS_PP1_ %i +select -assert-count 1 w:q4 %x t:$__DFFS_PP0_ %i +select -assert-count 1 w:q5 %x t:$__DFFS_PP1_ %i + +design -load ref +dff2dffs -match-init +clean + +select -assert-count 1 w:q0 %x t:$__DFFS_PP0_ %i +select -assert-count 0 w:q1 %x t:$__DFFS_PP1_ %i +select -assert-count 0 w:q2 %x t:$__DFFS_PP0_ %i +select -assert-count 1 w:q3 %x t:$__DFFS_PP1_ %i +select -assert-count 1 w:q4 %x t:$__DFFS_PP0_ %i +select -assert-count 1 w:q5 %x t:$__DFFS_PP1_ %i -- cgit v1.2.3 From c9f9518de4af34b2539d230c0894b04d174b755d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marcin=20Ko=C5=9Bcielnicki?= Date: Wed, 28 Aug 2019 14:58:14 +0000 Subject: Added extractinv pass --- tests/techmap/extractinv.ys | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 tests/techmap/extractinv.ys (limited to 'tests/techmap') diff --git a/tests/techmap/extractinv.ys b/tests/techmap/extractinv.ys new file mode 100644 index 000000000..6146f829a --- /dev/null +++ b/tests/techmap/extractinv.ys @@ -0,0 +1,41 @@ +read_verilog << EOT + +module ff4(...); +parameter [0:0] CLK_INV = 1'b0; +parameter [3:0] DATA_INV = 4'b0000; +(* invertible_pin = "CLK_INV" *) +input clk; +(* invertible_pin = "DATA_INV" *) +input [3:0] d; +output [3:0] q; +endmodule + +module inv(...); +output o; +input i; +endmodule + +module top(...); +input d0, d1, d2, d3; +input clk; +output q; +ff4 #(.DATA_INV(4'h5)) ff_inst (.clk(clk), .d({d3, d2, d1, d0}), .q(q)); +endmodule + +EOT + +extractinv -inv inv o:i +clean + +select -assert-count 2 top/t:inv +select -assert-count 2 top/t:inv top/t:ff4 %ci:+[d] %ci:+[o] %i + +select -assert-count 1 top/t:inv top/w:d0 %co:+[i] %i +select -assert-count 0 top/t:inv top/w:d1 %co:+[i] %i +select -assert-count 1 top/t:inv top/w:d2 %co:+[i] %i +select -assert-count 0 top/t:inv top/w:d3 %co:+[i] %i + +select -assert-count 0 top/t:ff4 top/w:d0 %co:+[d] %i +select -assert-count 1 top/t:ff4 top/w:d1 %co:+[d] %i +select -assert-count 0 top/t:ff4 top/w:d2 %co:+[d] %i +select -assert-count 1 top/t:ff4 top/w:d3 %co:+[d] %i -- cgit v1.2.3 From 6258e6a7e28ade2bdc7b6809675461326c873a45 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 20 Sep 2019 17:49:26 -0700 Subject: Add testcase --- tests/techmap/autopurge.ys | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 tests/techmap/autopurge.ys (limited to 'tests/techmap') diff --git a/tests/techmap/autopurge.ys b/tests/techmap/autopurge.ys new file mode 100644 index 000000000..4773d5ce3 --- /dev/null +++ b/tests/techmap/autopurge.ys @@ -0,0 +1,43 @@ +# https://github.com/YosysHQ/yosys/issues/1391 +read_verilog < Date: Fri, 20 Sep 2019 17:58:51 -0700 Subject: Hell let's add the original #1381 testcase too --- tests/techmap/autopurge.ys | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) (limited to 'tests/techmap') diff --git a/tests/techmap/autopurge.ys b/tests/techmap/autopurge.ys index 4773d5ce3..1eb99ec37 100644 --- a/tests/techmap/autopurge.ys +++ b/tests/techmap/autopurge.ys @@ -1,6 +1,6 @@ -# https://github.com/YosysHQ/yosys/issues/1391 +# https://github.com/YosysHQ/yosys/issues/1381 read_verilog <