From 4cf890dac121dc977fc4507168b48e47aecf5c46 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Fri, 28 Jul 2017 15:33:30 +0200 Subject: Add simple VHDL+PSL example --- tests/sva/.gitignore | 2 ++ 1 file changed, 2 insertions(+) (limited to 'tests/sva/.gitignore') diff --git a/tests/sva/.gitignore b/tests/sva/.gitignore index 254013047..cc254049a 100644 --- a/tests/sva/.gitignore +++ b/tests/sva/.gitignore @@ -3,3 +3,5 @@ /*_pass /*_fail /*.ok +/vhdlpsl[0-9][0-9] +/vhdlpsl[0-9][0-9].sby -- cgit v1.2.3