From f858219c4ed18fb5886641efd1e71f5aad0b1c84 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sat, 15 Feb 2020 08:29:10 -0800 Subject: Cleanup tests --- tests/arch/xilinx/bug1480.ys | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 tests/arch/xilinx/bug1480.ys (limited to 'tests/arch') diff --git a/tests/arch/xilinx/bug1480.ys b/tests/arch/xilinx/bug1480.ys new file mode 100644 index 000000000..84faea08a --- /dev/null +++ b/tests/arch/xilinx/bug1480.ys @@ -0,0 +1,18 @@ +read_verilog << EOF +module top(...); + +input signed [17:0] A; +input signed [17:0] B; +output X; +output Y; + +wire [35:0] P; +assign P = A * B; + +assign X = P[0]; +assign Y = P[35]; + +endmodule +EOF + +synth_xilinx -- cgit v1.2.3