From 94e6b70736934bd8ebb09c7cc74cfd443bd1d9eb Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Wed, 31 Dec 2014 16:53:53 +0100
Subject: Added memory_bram (not functional yet)

---
 techlibs/xilinx/brams.txt | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 techlibs/xilinx/brams.txt

(limited to 'techlibs')

diff --git a/techlibs/xilinx/brams.txt b/techlibs/xilinx/brams.txt
new file mode 100644
index 000000000..03bd2b2b3
--- /dev/null
+++ b/techlibs/xilinx/brams.txt
@@ -0,0 +1,20 @@
+
+# This is a very simplified description of the capabilities of
+# the Xilinx RAMB36 core. But it is a start..
+#
+bram XILINX_RAMB36_SDP32
+  init 1
+  abits 10
+  dbits 32
+  groups 2
+  wports 1 0
+  rports 0 1
+  wenabl 2 0
+  transp 0 2
+  clocks 1 2
+endbram
+
+match XILINX_RAMB36_SDP32
+  min bits 1024
+endmatch
+
-- 
cgit v1.2.3