From 816fe6bbe0ad90f7a696dd208dae6db8139dfd00 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sun, 1 Feb 2015 17:09:34 +0100 Subject: Added Xilinx example for Basys3 board --- techlibs/xilinx/example_basys3/run_yosys.ys | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 techlibs/xilinx/example_basys3/run_yosys.ys (limited to 'techlibs/xilinx/example_basys3/run_yosys.ys') diff --git a/techlibs/xilinx/example_basys3/run_yosys.ys b/techlibs/xilinx/example_basys3/run_yosys.ys new file mode 100644 index 000000000..4541826d3 --- /dev/null +++ b/techlibs/xilinx/example_basys3/run_yosys.ys @@ -0,0 +1,2 @@ +read_verilog example.v +synth_xilinx -edif example.edif -top example -- cgit v1.2.3