From 90d00182cfe358438d777f2ca7abacb4c6a2733c Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Wed, 19 Dec 2018 10:18:47 +0800 Subject: anlogic: implement DRAM initialization As the TD tool doesn't accept the DRAM cell to contain unknown values in the initial value, the initialzation support of DRAM is previously skipped. Now add the support by add a new pass to determine unknown values in the initial value. Signed-off-by: Icenowy Zheng --- techlibs/anlogic/drams_map.v | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'techlibs/anlogic/drams_map.v') diff --git a/techlibs/anlogic/drams_map.v b/techlibs/anlogic/drams_map.v index 87cbb6a45..084e2a25f 100644 --- a/techlibs/anlogic/drams_map.v +++ b/techlibs/anlogic/drams_map.v @@ -1,4 +1,5 @@ module \$__ANLOGIC_DRAM16X4 (CLK1, A1ADDR, A1DATA, B1ADDR, B1DATA, B1EN); + parameter [63:0]INIT = 64'bx; input CLK1; input [3:0] A1ADDR; @@ -8,7 +9,9 @@ module \$__ANLOGIC_DRAM16X4 (CLK1, A1ADDR, A1DATA, B1ADDR, B1DATA, B1EN); input [3:0] B1DATA; input B1EN; - EG_LOGIC_DRAM16X4 _TECHMAP_REPLACE_ ( + EG_LOGIC_DRAM16X4 #( + `include "dram_init_16x4.vh" + ) _TECHMAP_REPLACE_ ( .di(B1DATA), .waddr(B1ADDR), .wclk(CLK1), -- cgit v1.2.3