From 3a390733027584071d0cd3b2d99c738ce6f1a829 Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Thu, 12 Sep 2019 17:10:43 -0700
Subject: Set more ports explicitly

---
 passes/pmgen/xilinx_dsp.cc | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'passes')

diff --git a/passes/pmgen/xilinx_dsp.cc b/passes/pmgen/xilinx_dsp.cc
index ae8cd64da..e0c7823ed 100644
--- a/passes/pmgen/xilinx_dsp.cc
+++ b/passes/pmgen/xilinx_dsp.cc
@@ -44,6 +44,8 @@ static Cell* addDsp(Module *module) {
 	cell->setParam("\\OPMODEREG", 0);
 	cell->setParam("\\PREG", 0);
 	cell->setParam("\\USE_MULT", Const("NONE"));
+	cell->setParam("\\USE_SIMD", Const("ONE48"));
+	cell->setParam("\\USE_DPORT", Const("FALSE"));
 
 	cell->setPort("\\D", Const(0, 24));
 	cell->setPort("\\INMODE", Const(0, 5));
-- 
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