From 09ee65a050ffc8fe1a208140cce32a6a5f15c4ab Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sun, 8 Feb 2015 18:56:06 +0100 Subject: Added eval_select_args() and eval_select_op() --- passes/cmds/select.cc | 31 +++++++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) (limited to 'passes') diff --git a/passes/cmds/select.cc b/passes/cmds/select.cc index 187db2a8b..f8cfa9ced 100644 --- a/passes/cmds/select.cc +++ b/passes/cmds/select.cc @@ -801,7 +801,7 @@ PRIVATE_NAMESPACE_END YOSYS_NAMESPACE_BEGIN // used in kernel/register.cc and maybe other locations, extern decl. in register.h -void handle_extra_select_args(Pass *pass, std::vector args, size_t argidx, size_t args_size, RTLIL::Design *design) +void handle_extra_select_args(Pass *pass, vector args, size_t argidx, size_t args_size, RTLIL::Design *design) { work_stack.clear(); for (; argidx < args_size; argidx++) { @@ -817,10 +817,33 @@ void handle_extra_select_args(Pass *pass, std::vector args, size_t select_op_union(design, work_stack.front(), work_stack.back()); work_stack.pop_back(); } - if (work_stack.size() > 0) - design->selection_stack.push_back(work_stack.back()); - else + if (work_stack.empty()) design->selection_stack.push_back(RTLIL::Selection(false)); + else + design->selection_stack.push_back(work_stack.back()); +} + +// extern decl. in register.h +RTLIL::Selection eval_select_args(const vector &args, RTLIL::Design *design) +{ + work_stack.clear(); + for (auto &arg : args) + select_stmt(design, arg); + while (work_stack.size() > 1) { + select_op_union(design, work_stack.front(), work_stack.back()); + work_stack.pop_back(); + } + if (work_stack.empty()) + return RTLIL::Selection(false); + return work_stack.back(); +} + +// extern decl. in register.h +void eval_select_op(vector &work, string &op, RTLIL::Design *design) +{ + work_stack.swap(work); + select_stmt(design, op); + work_stack.swap(work); } YOSYS_NAMESPACE_END -- cgit v1.2.3