From f9a307a50b5ce67b67d2b53e8c1334ea23ffd997 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 27 Sep 2014 16:17:53 +0200 Subject: namespace Yosys --- passes/techmap/iopadmap.cc | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'passes/techmap/iopadmap.cc') diff --git a/passes/techmap/iopadmap.cc b/passes/techmap/iopadmap.cc index 9cd23ce6f..76d6115ae 100644 --- a/passes/techmap/iopadmap.cc +++ b/passes/techmap/iopadmap.cc @@ -21,7 +21,10 @@ #include "kernel/rtlil.h" #include "kernel/log.h" -static void split_portname_pair(std::string &port1, std::string &port2) +USING_YOSYS_NAMESPACE +PRIVATE_NAMESPACE_BEGIN + +void split_portname_pair(std::string &port1, std::string &port2) { size_t pos = port1.find_first_of(':'); if (pos != std::string::npos) { @@ -207,3 +210,4 @@ struct IopadmapPass : public Pass { } } IopadmapPass; +PRIVATE_NAMESPACE_END -- cgit v1.2.3 From 4a0b3a5423175eed7f1de9e975ee1fb20a2eb3ae Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Tue, 6 Jan 2015 14:37:50 +0100 Subject: Various small improvements to synth_xilinx --- passes/techmap/iopadmap.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'passes/techmap/iopadmap.cc') diff --git a/passes/techmap/iopadmap.cc b/passes/techmap/iopadmap.cc index 76d6115ae..75d02c828 100644 --- a/passes/techmap/iopadmap.cc +++ b/passes/techmap/iopadmap.cc @@ -62,8 +62,8 @@ struct IopadmapPass : public Pass { log("\n"); log(" -bits\n"); log(" create individual bit-wide buffers even for ports that\n"); - log(" are wider. (the default behavio is to create word-wide\n"); - log(" buffers use -widthparam to set the word size on the cell.)\n"); + log(" are wider. (the default behavior is to create word-wide\n"); + log(" buffers using -widthparam to set the word size on the cell.)\n"); log("\n"); } virtual void execute(std::vector args, RTLIL::Design *design) -- cgit v1.2.3 From 331f8b8d0ba2c11aac89f15622b23a0284c538d7 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Wed, 25 Feb 2015 23:01:42 +0100 Subject: Bugfix in iopadmap --- passes/techmap/iopadmap.cc | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) (limited to 'passes/techmap/iopadmap.cc') diff --git a/passes/techmap/iopadmap.cc b/passes/techmap/iopadmap.cc index 75d02c828..3fba0e618 100644 --- a/passes/techmap/iopadmap.cc +++ b/passes/techmap/iopadmap.cc @@ -114,18 +114,11 @@ struct IopadmapPass : public Pass { } extra_args(args, argidx, design); - for (auto &it : design->modules_) + for (auto module : design->selected_modules()) { - RTLIL::Module *module = it.second; - - if (!design->selected(module) || module->get_bool_attribute("\\blackbox")) - continue; - - for (auto &it2 : module->wires_) + for (auto wire : module->selected_wires()) { - RTLIL::Wire *wire = it2.second; - - if (!wire->port_id || !design->selected(module, wire)) + if (!wire->port_id) continue; std::string celltype, portname, portname2; -- cgit v1.2.3