From 75009ada3c2a4bcd38c52c8fb871c9e8c1f2e6b1 Mon Sep 17 00:00:00 2001 From: Ruben Undheim Date: Thu, 11 Oct 2018 23:33:31 +0200 Subject: Synthesis support for SystemVerilog interfaces This time doing the changes mostly in AST before RTLIL generation --- kernel/rtlil.cc | 15 +++++++++++++++ kernel/rtlil.h | 2 ++ 2 files changed, 17 insertions(+) (limited to 'kernel') diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index a4fa2cf04..fadac0872 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -639,6 +639,13 @@ RTLIL::Module::~Module() delete it->second; } +void RTLIL::Module::reprocess_module(RTLIL::Design *design, dict local_interfaces) +{ + log_error("Cannot reprocess_module module `%s' !\n", id2cstr(name)); + (void)local_interfaces; // To remove build warning + (void)design; // To remove build warning +} + RTLIL::IdString RTLIL::Module::derive(RTLIL::Design*, dict, bool mayfail) { if (mayfail) @@ -646,6 +653,14 @@ RTLIL::IdString RTLIL::Module::derive(RTLIL::Design*, dict, dict , bool mayfail) +{ + if (mayfail) + return RTLIL::IdString(); + log_error("Module `%s' is used with parameters but is not parametric!\n", id2cstr(name)); +} + size_t RTLIL::Module::count_id(RTLIL::IdString id) { return wires_.count(id) + memories.count(id) + cells_.count(id) + processes.count(id); diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 027faf416..8a2b0a4f3 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -907,7 +907,9 @@ public: Module(); virtual ~Module(); virtual RTLIL::IdString derive(RTLIL::Design *design, dict parameters, bool mayfail = false); + virtual RTLIL::IdString derive(RTLIL::Design *design, dict parameters, dict interfaces, bool mayfail = false); virtual size_t count_id(RTLIL::IdString id); + virtual void reprocess_module(RTLIL::Design *design, dict local_interfaces); virtual void sort(); virtual void check(); -- cgit v1.2.3 From 458a94059e6738d93a87ddb9af282d0e1d28791d Mon Sep 17 00:00:00 2001 From: Ruben Undheim Date: Fri, 12 Oct 2018 20:58:37 +0200 Subject: Support for 'modports' for System Verilog interfaces --- kernel/rtlil.cc | 2 +- kernel/rtlil.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'kernel') diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index fadac0872..07dd4bfa0 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -654,7 +654,7 @@ RTLIL::IdString RTLIL::Module::derive(RTLIL::Design*, dict, dict , bool mayfail) +RTLIL::IdString RTLIL::Module::derive(RTLIL::Design*, dict, dict, dict, bool mayfail) { if (mayfail) return RTLIL::IdString(); diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 8a2b0a4f3..276540aa1 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -907,7 +907,7 @@ public: Module(); virtual ~Module(); virtual RTLIL::IdString derive(RTLIL::Design *design, dict parameters, bool mayfail = false); - virtual RTLIL::IdString derive(RTLIL::Design *design, dict parameters, dict interfaces, bool mayfail = false); + virtual RTLIL::IdString derive(RTLIL::Design *design, dict parameters, dict interfaces, dict modports, bool mayfail = false); virtual size_t count_id(RTLIL::IdString id); virtual void reprocess_module(RTLIL::Design *design, dict local_interfaces); -- cgit v1.2.3 From c50afc4246d552db079aec303b0d79ae92107a67 Mon Sep 17 00:00:00 2001 From: Ruben Undheim Date: Sat, 13 Oct 2018 20:34:44 +0200 Subject: Documentation improvements etc. - Mention new feature in the SystemVerilog section in the README file - Commented changes much better - Rename a few signals to make it clearer - Prevent warning for unused signals in an easier way - Add myself as copyright holder to 2 files - Fix one potential memory leak (delete 'wire' if not in modport) --- kernel/rtlil.cc | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'kernel') diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 07dd4bfa0..14259f8ed 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -639,11 +639,9 @@ RTLIL::Module::~Module() delete it->second; } -void RTLIL::Module::reprocess_module(RTLIL::Design *design, dict local_interfaces) +void RTLIL::Module::reprocess_module(RTLIL::Design *, dict) { log_error("Cannot reprocess_module module `%s' !\n", id2cstr(name)); - (void)local_interfaces; // To remove build warning - (void)design; // To remove build warning } RTLIL::IdString RTLIL::Module::derive(RTLIL::Design*, dict, bool mayfail) -- cgit v1.2.3