From 7350f7692a559fbde534c61e8bcd6ece93d0a3d7 Mon Sep 17 00:00:00 2001 From: Kevin Kiningham Date: Wed, 13 Dec 2017 13:27:52 -0800 Subject: Use quote includes for yosys.h --- kernel/celltypes.h | 2 +- kernel/cost.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'kernel') diff --git a/kernel/celltypes.h b/kernel/celltypes.h index 9f775cde7..5218b5363 100644 --- a/kernel/celltypes.h +++ b/kernel/celltypes.h @@ -20,7 +20,7 @@ #ifndef CELLTYPES_H #define CELLTYPES_H -#include +#include "kernel/yosys.h" YOSYS_NAMESPACE_BEGIN diff --git a/kernel/cost.h b/kernel/cost.h index 84fd6cd6d..e795b571b 100644 --- a/kernel/cost.h +++ b/kernel/cost.h @@ -20,7 +20,7 @@ #ifndef COST_H #define COST_H -#include +#include "kernel/yosys.h" YOSYS_NAMESPACE_BEGIN -- cgit v1.2.3 From 96ad6888496f4cd34bbf461ce26f97f598bf898c Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Tue, 12 Dec 2017 21:48:31 +0100 Subject: Add SigSpec::is_fully_ones() --- kernel/rtlil.cc | 15 +++++++++++++++ kernel/rtlil.h | 1 + 2 files changed, 16 insertions(+) (limited to 'kernel') diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 8c3d2962c..7dc7107c1 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -3353,6 +3353,21 @@ bool RTLIL::SigSpec::is_fully_zero() const return true; } +bool RTLIL::SigSpec::is_fully_ones() const +{ + cover("kernel.rtlil.sigspec.is_fully_ones"); + + pack(); + for (auto it = chunks_.begin(); it != chunks_.end(); it++) { + if (it->width > 0 && it->wire != NULL) + return false; + for (size_t i = 0; i < it->data.size(); i++) + if (it->data[i] != RTLIL::State::S1) + return false; + } + return true; +} + bool RTLIL::SigSpec::is_fully_def() const { cover("kernel.rtlil.sigspec.is_fully_def"); diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 6ce9b6748..b33cb53a3 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -704,6 +704,7 @@ public: bool is_fully_const() const; bool is_fully_zero() const; + bool is_fully_ones() const; bool is_fully_def() const; bool is_fully_undef() const; bool has_const() const; -- cgit v1.2.3 From 76afff7ef67265b296455649c9bc6f0196aa5390 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Thu, 14 Dec 2017 02:06:39 +0100 Subject: Add RTLIL::Const::is_fully_ones() --- kernel/rtlil.cc | 11 +++++++++++ kernel/rtlil.h | 1 + 2 files changed, 12 insertions(+) (limited to 'kernel') diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 7dc7107c1..3e873054f 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -172,6 +172,17 @@ bool RTLIL::Const::is_fully_zero() const return true; } +bool RTLIL::Const::is_fully_ones() const +{ + cover("kernel.rtlil.const.is_fully_ones"); + + for (auto bit : bits) + if (bit != RTLIL::State::S1) + return false; + + return true; +} + bool RTLIL::Const::is_fully_def() const { cover("kernel.rtlil.const.is_fully_def"); diff --git a/kernel/rtlil.h b/kernel/rtlil.h index b33cb53a3..fc29e1e65 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -480,6 +480,7 @@ struct RTLIL::Const inline const RTLIL::State &operator[](int index) const { return bits.at(index); } bool is_fully_zero() const; + bool is_fully_ones() const; bool is_fully_def() const; bool is_fully_undef() const; -- cgit v1.2.3