From 0e1661f84e99f1d4a487e7a432b05a6cb2071714 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Thu, 7 Nov 2013 16:53:28 +0100
Subject: Fixed type of sign extension in opt_const $eq/$ne handling

---
 kernel/rtlil.cc | 16 ++++++++++++++++
 kernel/rtlil.h  |  1 +
 2 files changed, 17 insertions(+)

(limited to 'kernel')

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index d64a37bb8..4388acb1d 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -940,6 +940,22 @@ void RTLIL::SigSpec::extend(int width, bool is_signed)
 	optimize();
 }
 
+void RTLIL::SigSpec::extend_un0(int width, bool is_signed)
+{
+	if (this->width > width)
+		remove(width, this->width - width);
+	
+	if (this->width < width) {
+		RTLIL::SigSpec padding = this->width > 0 ? extract(this->width - 1, 1) : RTLIL::SigSpec(RTLIL::State::S0);
+		if (!is_signed)
+			padding = RTLIL::SigSpec(RTLIL::State::S0);
+		while (this->width < width)
+			append(padding);
+	}
+
+	optimize();
+}
+
 void RTLIL::SigSpec::check() const
 {
 	int w = 0;
diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index 6cb471b58..376a09abf 100644
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -342,6 +342,7 @@ struct RTLIL::SigSpec {
 	void append(const RTLIL::SigSpec &signal);
 	bool combine(RTLIL::SigSpec signal, RTLIL::State freeState = RTLIL::State::Sz, bool override = false);
 	void extend(int width, bool is_signed = false);
+	void extend_un0(int width, bool is_signed = false);
 	void check() const;
 	bool operator <(const RTLIL::SigSpec &other) const;
 	bool operator ==(const RTLIL::SigSpec &other) const;
-- 
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