From 3650fd7fbe45a00792770d9ecb9397bc27ea0845 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Fri, 12 Jul 2013 13:13:04 +0200 Subject: More fixes in ternary op sign handling --- frontends/ast/genrtlil.cc | 3 +++ 1 file changed, 3 insertions(+) (limited to 'frontends') diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index a9574254d..e7ceec5f9 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -998,6 +998,9 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint) // generate multiplexer for ternary operator (aka ?:-operator) case AST_TERNARY: { + if (width_hint < 0) + detectSignWidth(width_hint, sign_hint); + RTLIL::SigSpec cond = children[0]->genRTLIL(); RTLIL::SigSpec val1 = children[1]->genRTLIL(width_hint, sign_hint); RTLIL::SigSpec val2 = children[2]->genRTLIL(width_hint, sign_hint); -- cgit v1.2.3