From af36943cb979f9e70cb2254090560cf346c11af0 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 11 Dec 2019 16:26:26 -0800 Subject: Preserve size of $genval$-s in for loops --- frontends/ast/simplify.cc | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'frontends') diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc index 44fd32cdc..8cbf5a6e2 100644 --- a/frontends/ast/simplify.cc +++ b/frontends/ast/simplify.cc @@ -1198,6 +1198,15 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, varbuf = new AstNode(AST_LOCALPARAM, varbuf); varbuf->str = init_ast->children[0]->str; + auto resolved = current_scope.at(init_ast->children[0]->str); + if (resolved->range_valid) { + varbuf->range_left = resolved->range_left; + varbuf->range_right = resolved->range_right; + varbuf->range_swapped = resolved->range_swapped; + varbuf->range_valid = resolved->range_valid; + log_dump(varbuf->range_left, varbuf->range_right); + } + AstNode *backup_scope_varbuf = current_scope[varbuf->str]; current_scope[varbuf->str] = varbuf; @@ -2998,6 +3007,14 @@ void AstNode::expand_genblock(std::string index_var, std::string prefix, std::ma current_ast_mod->children.push_back(p); str = p->str; id2ast = p; + + auto resolved = current_scope.at(index_var); + if (resolved->range_valid) { + p->range_left = resolved->range_left; + p->range_right = resolved->range_right; + p->range_swapped = resolved->range_swapped; + p->range_valid = resolved->range_valid; + } } } -- cgit v1.2.3 From 1ac1697e15ff72e69f4dfbf6922f0871c81bdff2 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Wed, 11 Dec 2019 16:59:00 -0800 Subject: Stray log_dump --- frontends/ast/simplify.cc | 1 - 1 file changed, 1 deletion(-) (limited to 'frontends') diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc index 8cbf5a6e2..b94a8d710 100644 --- a/frontends/ast/simplify.cc +++ b/frontends/ast/simplify.cc @@ -1204,7 +1204,6 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, varbuf->range_right = resolved->range_right; varbuf->range_swapped = resolved->range_swapped; varbuf->range_valid = resolved->range_valid; - log_dump(varbuf->range_left, varbuf->range_right); } AstNode *backup_scope_varbuf = current_scope[varbuf->str]; -- cgit v1.2.3 From e9dc2759c414bdc8ab663fd5c8350b40b099b456 Mon Sep 17 00:00:00 2001 From: Rodrigo Alejandro Melo Date: Fri, 13 Dec 2019 10:17:05 -0300 Subject: Fixed some missing "verilog_" in documentation --- frontends/verilog/preproc.cc | 2 +- frontends/verilog/verilog_lexer.l | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'frontends') diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc index 7e107dc26..161253a99 100644 --- a/frontends/verilog/preproc.cc +++ b/frontends/verilog/preproc.cc @@ -28,7 +28,7 @@ * * Ad-hoc implementation of a Verilog preprocessor. The directives `define, * `include, `ifdef, `ifndef, `else and `endif are handled here. All other - * directives are handled by the lexer (see lexer.l). + * directives are handled by the lexer (see verilog_lexer.l). * */ diff --git a/frontends/verilog/verilog_lexer.l b/frontends/verilog/verilog_lexer.l index c8984c2c4..ca23df3e8 100644 --- a/frontends/verilog/verilog_lexer.l +++ b/frontends/verilog/verilog_lexer.l @@ -28,7 +28,7 @@ * * A simple lexer for Verilog code. Non-preprocessor compiler directives are * handled here. The preprocessor stuff is handled in preproc.cc. Everything - * else is left to the bison parser (see parser.y). + * else is left to the bison parser (see verilog_parser.y). * */ -- cgit v1.2.3 From 22dd9f107c8986463041709aabcd0c886c87d33f Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Wed, 18 Dec 2019 13:06:34 +0100 Subject: Send people to symbioticeda.com instead of verific.com Signed-off-by: Clifford Wolf --- frontends/verific/README | 8 ++++++-- frontends/verific/verific.cc | 23 ++++++++++++++++++++--- 2 files changed, 26 insertions(+), 5 deletions(-) (limited to 'frontends') diff --git a/frontends/verific/README b/frontends/verific/README index 89584f2e8..c37d76343 100644 --- a/frontends/verific/README +++ b/frontends/verific/README @@ -1,7 +1,11 @@ - This directory contains Verific bindings for Yosys. -See http://www.verific.com/ for details. + +Use Symbiotic EDA Suite if you need Yosys+Verifc. +https://www.symbioticeda.com/seda-suite + +Contact office@symbioticeda.com for free evaluation +binaries of Symbiotic EDA Suite. Verific Features that should be enabled in your Verific library diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 843e7b9b4..9274cf5ca 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -2065,7 +2065,12 @@ struct VerificPass : public Pass { log(" -d \n"); log(" Dump the Verific netlist as a verilog file.\n"); log("\n"); - log("Visit http://verific.com/ for more information on Verific.\n"); + log("\n"); + log("Use Symbiotic EDA Suite if you need Yosys+Verifc.\n"); + log("https://www.symbioticeda.com/seda-suite\n"); + log("\n"); + log("Contact office@symbioticeda.com for free evaluation\n"); + log("binaries of Symbiotic EDA Suite.\n"); log("\n"); } #ifdef YOSYS_ENABLE_VERIFIC @@ -2074,7 +2079,13 @@ struct VerificPass : public Pass { static bool set_verific_global_flags = true; if (check_noverific_env()) - log_cmd_error("This version of Yosys is built without Verific support.\n"); + log_cmd_error("This version of Yosys is built without Verific support.\n" + "\n" + "Use Symbiotic EDA Suite if you need Yosys+Verifc.\n" + "https://www.symbioticeda.com/seda-suite\n" + "\n" + "Contact office@symbioticeda.com for free evaluation\n" + "binaries of Symbiotic EDA Suite.\n"); log_header(design, "Executing VERIFIC (loading SystemVerilog and VHDL designs using Verific).\n"); @@ -2493,7 +2504,13 @@ struct VerificPass : public Pass { } #else /* YOSYS_ENABLE_VERIFIC */ void execute(std::vector, RTLIL::Design *) YS_OVERRIDE { - log_cmd_error("This version of Yosys is built without Verific support.\n"); + log_cmd_error("This version of Yosys is built without Verific support.\n" + "\n" + "Use Symbiotic EDA Suite if you need Yosys+Verifc.\n" + "https://www.symbioticeda.com/seda-suite\n" + "\n" + "Contact office@symbioticeda.com for free evaluation\n" + "binaries of Symbiotic EDA Suite.\n"); } #endif } VerificPass; -- cgit v1.2.3