From 10e5791c5e5660cb784503d36439ee90d61eb06b Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sun, 27 Jul 2014 10:18:00 +0200
Subject: Refactoring: Renamed RTLIL::Design::modules to modules_

---
 frontends/ast/ast.cc         | 10 +++++-----
 frontends/liberty/liberty.cc |  4 ++--
 2 files changed, 7 insertions(+), 7 deletions(-)

(limited to 'frontends')

diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc
index 3f704bea4..170416869 100644
--- a/frontends/ast/ast.cc
+++ b/frontends/ast/ast.cc
@@ -931,7 +931,7 @@ void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump
 			(*it)->str = (*it)->str.substr(1);
 		if (defer)
 			(*it)->str = "$abstract" + (*it)->str;
-		if (design->modules.count((*it)->str)) {
+		if (design->modules_.count((*it)->str)) {
 			if (!ignore_redef)
 				log_error("Re-definition of module `%s' at %s:%d!\n",
 						(*it)->str.c_str(), (*it)->filename.c_str(), (*it)->linenum);
@@ -939,7 +939,7 @@ void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump
 					(*it)->str.c_str(), (*it)->filename.c_str(), (*it)->linenum);
 			continue;
 		}
-		design->modules[(*it)->str] =  process_module(*it, defer);
+		design->modules_[(*it)->str] =  process_module(*it, defer);
 	}
 }
 
@@ -1036,10 +1036,10 @@ RTLIL::IdString AstModule::derive(RTLIL::Design *design, std::map<RTLIL::IdStrin
 		modname = "$paramod" + stripped_name + para_info;
 	}
 
-	if (design->modules.count(modname) == 0) {
+	if (design->modules_.count(modname) == 0) {
 		new_ast->str = modname;
-		design->modules[modname] = process_module(new_ast, false);
-		design->modules[modname]->check();
+		design->modules_[modname] = process_module(new_ast, false);
+		design->modules_[modname]->check();
 	} else {
 		log("Found cached RTLIL representation for module `%s'.\n", modname.c_str());
 	}
diff --git a/frontends/liberty/liberty.cc b/frontends/liberty/liberty.cc
index 0107b974a..d5f172f03 100644
--- a/frontends/liberty/liberty.cc
+++ b/frontends/liberty/liberty.cc
@@ -476,7 +476,7 @@ struct LibertyFrontend : public Frontend {
 
 			std::string cell_name = RTLIL::escape_id(cell->args.at(0));
 
-			if (design->modules.count(cell_name)) {
+			if (design->modules_.count(cell_name)) {
 				if (flag_ignore_redef)
 					continue;
 				log_error("Duplicate definition of cell/module %s.\n", RTLIL::id2cstr(cell_name));
@@ -564,7 +564,7 @@ struct LibertyFrontend : public Frontend {
 			}
 
 			module->fixup_ports();
-			design->modules[module->name] = module;
+			design->modules_[module->name] = module;
 			cell_count++;
 skip_cell:;
 		}
-- 
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