From 0defc86519fb02dd366b20ccec4add09302eae98 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Tue, 11 Feb 2014 19:17:07 +0100
Subject: renamed ilang "scope error" to "ilang error"

---
 frontends/ilang/parser.y | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index c2e090220..ebb4d3095 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -87,7 +87,7 @@ design:
 module:
 	TOK_MODULE TOK_ID EOL {
 		if (current_design->modules.count($2) != 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: redefinition of module %s.", $2).c_str());
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of module %s.", $2).c_str());
 		current_module = new RTLIL::Module;
 		current_module->name = $2;
 		current_module->attributes = attrbuf;
@@ -120,7 +120,7 @@ wire_stmt:
 		attrbuf.clear();
 	} wire_options TOK_ID EOL {
 		if (current_module->wires.count($4) != 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: redefinition of wire %s.", $4).c_str());
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of wire %s.", $4).c_str());
 		current_wire->name = $4;
 		current_module->wires[$4] = current_wire;
 		free($4);
@@ -157,7 +157,7 @@ memory_stmt:
 		attrbuf.clear();
 	} memory_options TOK_ID EOL {
 		if (current_module->memories.count($4) != 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: redefinition of memory %s.", $4).c_str());
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of memory %s.", $4).c_str());
 		current_memory->name = $4;
 		current_module->memories[$4] = current_memory;
 		free($4);
@@ -175,7 +175,7 @@ memory_options:
 cell_stmt:
 	TOK_CELL TOK_ID TOK_ID EOL {
 		if (current_module->cells.count($3) != 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: redefinition of cell %s.", $3).c_str());
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of cell %s.", $3).c_str());
 		current_cell = new RTLIL::Cell;
 		current_cell->type = $2;
 		current_cell->name = $3;
@@ -200,7 +200,7 @@ cell_body:
 	} |
 	cell_body TOK_CONNECT TOK_ID sigspec EOL {
 		if (current_cell->connections.count($3) != 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: redefinition of cell port %s.", $3).c_str());
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of cell port %s.", $3).c_str());
 		current_cell->connections[$3] = *$4;
 		delete $4;
 		free($3);
@@ -210,7 +210,7 @@ cell_body:
 proc_stmt:
 	TOK_PROCESS TOK_ID EOL {
 		if (current_module->processes.count($2) != 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: redefinition of process %s.", $2).c_str());
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of process %s.", $2).c_str());
 		current_process = new RTLIL::Process;
 		current_process->name = $2;
 		current_process->attributes = attrbuf;
@@ -362,7 +362,7 @@ sigspec:
 	} |
 	TOK_ID {
 		if (current_module->wires.count($1) == 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: wire %s not found", $1).c_str());
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
 		RTLIL::SigChunk chunk;
 		chunk.wire = current_module->wires[$1];
 		chunk.width = current_module->wires[$1]->width;
@@ -374,7 +374,7 @@ sigspec:
 	} |
 	TOK_ID '[' TOK_INT ']' {
 		if (current_module->wires.count($1) == 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: wire %s not found", $1).c_str());
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
 		RTLIL::SigChunk chunk;
 		chunk.wire = current_module->wires[$1];
 		chunk.offset = $3;
@@ -386,7 +386,7 @@ sigspec:
 	} |
 	TOK_ID '[' TOK_INT ':' TOK_INT ']' {
 		if (current_module->wires.count($1) == 0)
-			rtlil_frontend_ilang_yyerror(stringf("scope error: wire %s not found", $1).c_str());
+			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
 		RTLIL::SigChunk chunk;
 		chunk.wire = current_module->wires[$1];
 		chunk.width = $3 - $5 + 1;
-- 
cgit v1.2.3


From 620d51d9f713d68ebc920b5b1cac59cc176b0b9d Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 7 Mar 2014 17:19:14 +0100
Subject: Bugfix in ilang frontend autoidx recovery

---
 frontends/ilang/lexer.l | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/lexer.l b/frontends/ilang/lexer.l
index 5da8ce675..000919275 100644
--- a/frontends/ilang/lexer.l
+++ b/frontends/ilang/lexer.l
@@ -131,8 +131,8 @@ void update_autoidx(const char *p)
 				q++;
 			if ((q - p) < 10) {
 				int idx = atoi(p);
-				if (idx > RTLIL::autoidx)
-					RTLIL::autoidx = idx;
+				if (idx >= RTLIL::autoidx)
+					RTLIL::autoidx = idx+1;
 			}
 		}
 	}
-- 
cgit v1.2.3


From a1be4816d602548f4454242dc17f8a85ccaa91bd Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sun, 20 Apr 2014 14:22:11 +0200
Subject: Replaced depricated %name-prefix= bison directive

---
 frontends/ilang/parser.y | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index ebb4d3095..6b41b0873 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -39,7 +39,7 @@ namespace ILANG_FRONTEND {
 using namespace ILANG_FRONTEND;
 %}
 
-%name-prefix="rtlil_frontend_ilang_yy"
+%name-prefix "rtlil_frontend_ilang_yy"
 
 %union {
 	char *string;
-- 
cgit v1.2.3


From 7188542155902bcf3880d482d472e91331f8a3ed Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sun, 20 Apr 2014 14:28:23 +0200
Subject: Fixed clang -Wdeprecated-register warnings

---
 frontends/ilang/lexer.l | 7 +++++++
 1 file changed, 7 insertions(+)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/lexer.l b/frontends/ilang/lexer.l
index 000919275..6557f98ab 100644
--- a/frontends/ilang/lexer.l
+++ b/frontends/ilang/lexer.l
@@ -23,9 +23,16 @@
  */
 
 %{
+
+#ifdef __clang__
+// bison generates code using the 'register' storage class specifier
+#pragma clang diagnostic ignored "-Wdeprecated-register"
+#endif
+
 #include "kernel/rtlil.h"
 #include "parser.tab.h"
 void update_autoidx(const char *p);
+
 %}
 
 %option yylineno
-- 
cgit v1.2.3


From 4147b55c233013dd861172f13d0b9669598d234c Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Mon, 21 Jul 2014 15:15:18 +0200
Subject: Added "autoidx" statement to ilang file format

---
 frontends/ilang/lexer.l  | 27 +++------------------------
 frontends/ilang/parser.y |  8 +++++++-
 2 files changed, 10 insertions(+), 25 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/lexer.l b/frontends/ilang/lexer.l
index 6557f98ab..c40b81af8 100644
--- a/frontends/ilang/lexer.l
+++ b/frontends/ilang/lexer.l
@@ -31,7 +31,6 @@
 
 #include "kernel/rtlil.h"
 #include "parser.tab.h"
-void update_autoidx(const char *p);
 
 %}
 
@@ -44,6 +43,7 @@ void update_autoidx(const char *p);
 
 %%
 
+"autoidx"	{ return TOK_AUTOIDX; }
 "module"	{ return TOK_MODULE; }
 "attribute"	{ return TOK_ATTRIBUTE; }
 "parameter"	{ return TOK_PARAMETER; }
@@ -76,11 +76,11 @@ void update_autoidx(const char *p);
 [a-z]+		{ return TOK_INVALID; }
 
 "\\"[^ \t\r\n]+		{ rtlil_frontend_ilang_yylval.string = strdup(yytext); return TOK_ID; }
-"$"[^ \t\r\n]+		{ rtlil_frontend_ilang_yylval.string = strdup(yytext); update_autoidx(yytext); return TOK_ID; }
+"$"[^ \t\r\n]+		{ rtlil_frontend_ilang_yylval.string = strdup(yytext); return TOK_ID; }
 "."[0-9]+		{ rtlil_frontend_ilang_yylval.string = strdup(yytext); return TOK_ID; }
 
 [0-9]+'[01xzm-]*	{ rtlil_frontend_ilang_yylval.string = strdup(yytext); return TOK_VALUE; }
-[0-9]+			{ rtlil_frontend_ilang_yylval.integer = atoi(yytext); return TOK_INT; }
+-?[0-9]+		{ rtlil_frontend_ilang_yylval.integer = atoi(yytext); return TOK_INT; }
 
 \"		{ BEGIN(STRING); }
 <STRING>\\.	{ yymore(); }
@@ -124,27 +124,6 @@ void update_autoidx(const char *p);
 
 %%
 
-void update_autoidx(const char *p)
-{
-	if (*p != '$')
-		return;
-
-	while (*p) {
-		if (*(p++) != '$')
-			continue;
-		if ('0' <= *p && *p <= '9') {
-			const char *q = p;
-			while ('0' <= *q && *q <= '9')
-				q++;
-			if ((q - p) < 10) {
-				int idx = atoi(p);
-				if (idx >= RTLIL::autoidx)
-					RTLIL::autoidx = idx+1;
-			}
-		}
-	}
-}
-
 // this is a hack to avoid the 'yyinput defined but not used' error msgs
 void *rtlil_frontend_ilang_avoid_input_warnings() {
 	return (void*)&yyinput;
diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index 6b41b0873..d8ecf37b7 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -50,7 +50,7 @@ using namespace ILANG_FRONTEND;
 
 %token <string> TOK_ID TOK_VALUE TOK_STRING
 %token <integer> TOK_INT
-%token TOK_MODULE TOK_WIRE TOK_WIDTH TOK_INPUT TOK_OUTPUT TOK_INOUT
+%token TOK_AUTOIDX TOK_MODULE TOK_WIRE TOK_WIDTH TOK_INPUT TOK_OUTPUT TOK_INOUT
 %token TOK_CELL TOK_CONNECT TOK_SWITCH TOK_CASE TOK_ASSIGN TOK_SYNC
 %token TOK_LOW TOK_HIGH TOK_POSEDGE TOK_NEGEDGE TOK_EDGE TOK_ALWAYS TOK_INIT
 %token TOK_UPDATE TOK_PROCESS TOK_END TOK_INVALID TOK_EOL TOK_OFFSET
@@ -82,6 +82,7 @@ optional_eol:
 design:
 	design module |
 	design attr_stmt |
+	design autoidx_stmt |
 	/* empty */;
 
 module:
@@ -113,6 +114,11 @@ attr_stmt:
 		free($2);
 	};
 
+autoidx_stmt:
+	TOK_AUTOIDX TOK_INT EOL {
+		RTLIL::autoidx = std::max(RTLIL::autoidx, $2);
+	};
+
 wire_stmt:
 	TOK_WIRE {
 		current_wire = new RTLIL::Wire;
-- 
cgit v1.2.3


From d6d0e08834560e824cc59027b720401a1c0b1fc7 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Tue, 22 Jul 2014 20:18:05 +0200
Subject: Fixed make rules for ilang parser

---
 frontends/ilang/Makefile.inc | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/Makefile.inc b/frontends/ilang/Makefile.inc
index 07ebf0856..f81c8de91 100644
--- a/frontends/ilang/Makefile.inc
+++ b/frontends/ilang/Makefile.inc
@@ -4,10 +4,12 @@ GENFILES += frontends/ilang/parser.tab.h
 GENFILES += frontends/ilang/parser.output
 GENFILES += frontends/ilang/lexer.cc
 
-frontends/ilang/parser.tab.cc frontends/ilang/parser.tab.h: frontends/ilang/parser.y
+frontends/ilang/parser.tab.cc: frontends/ilang/parser.y
 	bison -d -r all -b frontends/ilang/parser frontends/ilang/parser.y
 	mv frontends/ilang/parser.tab.c frontends/ilang/parser.tab.cc
 
+frontends/ilang/parser.tab.h: frontends/ilang/parser.tab.cc
+
 frontends/ilang/lexer.cc: frontends/ilang/lexer.l
 	flex -o frontends/ilang/lexer.cc frontends/ilang/lexer.l
 
-- 
cgit v1.2.3


From 3b5f4ff39c94a5a664043f35b95a50240ffe9d12 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Tue, 22 Jul 2014 20:35:58 +0200
Subject: Fixed ilang parsing of process attributes

---
 frontends/ilang/parser.y | 1 +
 1 file changed, 1 insertion(+)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index d8ecf37b7..cb438775f 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -225,6 +225,7 @@ proc_stmt:
 		switch_stack.push_back(&current_process->root_case.switches);
 		case_stack.clear();
 		case_stack.push_back(&current_process->root_case);
+		attrbuf.clear();
 		free($2);
 	} case_body sync_list TOK_END EOL;
 
-- 
cgit v1.2.3


From a233762a815fc180b371f699e865a7d7aed77bca Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Tue, 22 Jul 2014 19:56:17 +0200
Subject: SigSpec refactoring: renamed chunks and width to __chunks and __width

---
 frontends/ilang/parser.y | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index cb438775f..e6d3d4c5b 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -363,8 +363,8 @@ sigspec:
 		chunk.offset = 0;
 		chunk.data = *$1;
 		$$ = new RTLIL::SigSpec;
-		$$->chunks.push_back(chunk);
-		$$->width = chunk.width;
+		$$->__chunks.push_back(chunk);
+		$$->__width = chunk.width;
 		delete $1;
 	} |
 	TOK_ID {
@@ -375,8 +375,8 @@ sigspec:
 		chunk.width = current_module->wires[$1]->width;
 		chunk.offset = 0;
 		$$ = new RTLIL::SigSpec;
-		$$->chunks.push_back(chunk);
-		$$->width = chunk.width;
+		$$->__chunks.push_back(chunk);
+		$$->__width = chunk.width;
 		free($1);
 	} |
 	TOK_ID '[' TOK_INT ']' {
@@ -387,8 +387,8 @@ sigspec:
 		chunk.offset = $3;
 		chunk.width = 1;
 		$$ = new RTLIL::SigSpec;
-		$$->chunks.push_back(chunk);
-		$$->width = 1;
+		$$->__chunks.push_back(chunk);
+		$$->__width = 1;
 		free($1);
 	} |
 	TOK_ID '[' TOK_INT ':' TOK_INT ']' {
@@ -399,8 +399,8 @@ sigspec:
 		chunk.width = $3 - $5 + 1;
 		chunk.offset = $5;
 		$$ = new RTLIL::SigSpec;
-		$$->chunks.push_back(chunk);
-		$$->width = chunk.width;
+		$$->__chunks.push_back(chunk);
+		$$->__width = chunk.width;
 		free($1);
 	} |
 	'{' sigspec_list '}' {
@@ -410,13 +410,13 @@ sigspec:
 sigspec_list:
 	sigspec_list sigspec {
 		$$ = new RTLIL::SigSpec;
-		for (auto it = $2->chunks.begin(); it != $2->chunks.end(); it++) {
-			$$->chunks.push_back(*it);
-			$$->width += it->width;
+		for (auto it = $2->__chunks.begin(); it != $2->__chunks.end(); it++) {
+			$$->__chunks.push_back(*it);
+			$$->__width += it->width;
 		}
-		for (auto it = $1->chunks.begin(); it != $1->chunks.end(); it++) {
-			$$->chunks.push_back(*it);
-			$$->width += it->width;
+		for (auto it = $1->__chunks.begin(); it != $1->__chunks.end(); it++) {
+			$$->__chunks.push_back(*it);
+			$$->__width += it->width;
 		}
 		delete $1;
 		delete $2;
-- 
cgit v1.2.3


From 4b4048bc5feba1ab05c7a63f12c0a17879cb7e04 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Tue, 22 Jul 2014 20:15:14 +0200
Subject: SigSpec refactoring: using the accessor functions everywhere

---
 frontends/ilang/parser.y | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index e6d3d4c5b..e8af447ba 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -363,8 +363,8 @@ sigspec:
 		chunk.offset = 0;
 		chunk.data = *$1;
 		$$ = new RTLIL::SigSpec;
-		$$->__chunks.push_back(chunk);
-		$$->__width = chunk.width;
+		$$->chunks().push_back(chunk);
+		$$->size() = chunk.width;
 		delete $1;
 	} |
 	TOK_ID {
@@ -375,8 +375,8 @@ sigspec:
 		chunk.width = current_module->wires[$1]->width;
 		chunk.offset = 0;
 		$$ = new RTLIL::SigSpec;
-		$$->__chunks.push_back(chunk);
-		$$->__width = chunk.width;
+		$$->chunks().push_back(chunk);
+		$$->size() = chunk.width;
 		free($1);
 	} |
 	TOK_ID '[' TOK_INT ']' {
@@ -387,8 +387,8 @@ sigspec:
 		chunk.offset = $3;
 		chunk.width = 1;
 		$$ = new RTLIL::SigSpec;
-		$$->__chunks.push_back(chunk);
-		$$->__width = 1;
+		$$->chunks().push_back(chunk);
+		$$->size() = 1;
 		free($1);
 	} |
 	TOK_ID '[' TOK_INT ':' TOK_INT ']' {
@@ -399,8 +399,8 @@ sigspec:
 		chunk.width = $3 - $5 + 1;
 		chunk.offset = $5;
 		$$ = new RTLIL::SigSpec;
-		$$->__chunks.push_back(chunk);
-		$$->__width = chunk.width;
+		$$->chunks().push_back(chunk);
+		$$->size() = chunk.width;
 		free($1);
 	} |
 	'{' sigspec_list '}' {
@@ -410,13 +410,13 @@ sigspec:
 sigspec_list:
 	sigspec_list sigspec {
 		$$ = new RTLIL::SigSpec;
-		for (auto it = $2->__chunks.begin(); it != $2->__chunks.end(); it++) {
-			$$->__chunks.push_back(*it);
-			$$->__width += it->width;
+		for (auto it = $2->chunks().begin(); it != $2->chunks().end(); it++) {
+			$$->chunks().push_back(*it);
+			$$->size() += it->width;
 		}
-		for (auto it = $1->__chunks.begin(); it != $1->__chunks.end(); it++) {
-			$$->__chunks.push_back(*it);
-			$$->__width += it->width;
+		for (auto it = $1->chunks().begin(); it != $1->chunks().end(); it++) {
+			$$->chunks().push_back(*it);
+			$$->size() += it->width;
 		}
 		delete $1;
 		delete $2;
-- 
cgit v1.2.3


From 7bffde6abdaf6fc2ed090946442f90b2438e6126 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Tue, 22 Jul 2014 20:39:13 +0200
Subject: SigSpec refactoring: change RTLIL::SigSpec::size() to be read-only

---
 frontends/ilang/parser.y | 43 ++++++-------------------------------------
 1 file changed, 6 insertions(+), 37 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index e8af447ba..e4d12f3a1 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -357,50 +357,25 @@ constant:
 
 sigspec:
 	constant {
-		RTLIL::SigChunk chunk;
-		chunk.wire = NULL;
-		chunk.width = $1->bits.size();
-		chunk.offset = 0;
-		chunk.data = *$1;
-		$$ = new RTLIL::SigSpec;
-		$$->chunks().push_back(chunk);
-		$$->size() = chunk.width;
+		$$ = new RTLIL::SigSpec(*$1);
 		delete $1;
 	} |
 	TOK_ID {
 		if (current_module->wires.count($1) == 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
-		RTLIL::SigChunk chunk;
-		chunk.wire = current_module->wires[$1];
-		chunk.width = current_module->wires[$1]->width;
-		chunk.offset = 0;
-		$$ = new RTLIL::SigSpec;
-		$$->chunks().push_back(chunk);
-		$$->size() = chunk.width;
+		$$ = new RTLIL::SigSpec(current_module->wires[$1]);
 		free($1);
 	} |
 	TOK_ID '[' TOK_INT ']' {
 		if (current_module->wires.count($1) == 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
-		RTLIL::SigChunk chunk;
-		chunk.wire = current_module->wires[$1];
-		chunk.offset = $3;
-		chunk.width = 1;
-		$$ = new RTLIL::SigSpec;
-		$$->chunks().push_back(chunk);
-		$$->size() = 1;
+		$$ = new RTLIL::SigSpec(current_module->wires[$1], 1, $3);
 		free($1);
 	} |
 	TOK_ID '[' TOK_INT ':' TOK_INT ']' {
 		if (current_module->wires.count($1) == 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
-		RTLIL::SigChunk chunk;
-		chunk.wire = current_module->wires[$1];
-		chunk.width = $3 - $5 + 1;
-		chunk.offset = $5;
-		$$ = new RTLIL::SigSpec;
-		$$->chunks().push_back(chunk);
-		$$->size() = chunk.width;
+		$$ = new RTLIL::SigSpec(current_module->wires[$1], $3 - $5 + 1, $5);
 		free($1);
 	} |
 	'{' sigspec_list '}' {
@@ -410,14 +385,8 @@ sigspec:
 sigspec_list:
 	sigspec_list sigspec {
 		$$ = new RTLIL::SigSpec;
-		for (auto it = $2->chunks().begin(); it != $2->chunks().end(); it++) {
-			$$->chunks().push_back(*it);
-			$$->size() += it->width;
-		}
-		for (auto it = $1->chunks().begin(); it != $1->chunks().end(); it++) {
-			$$->chunks().push_back(*it);
-			$$->size() += it->width;
-		}
+		$$->append(*$2);
+		$$->append(*$1);
 		delete $1;
 		delete $2;
 	} |
-- 
cgit v1.2.3


From a8d3a68971ccc4e47c54a906aae374a9a54b1415 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Wed, 23 Jul 2014 08:40:31 +0200
Subject: Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor --
 step 2/3

---
 frontends/ilang/parser.y | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index e4d12f3a1..dcb51d44d 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -369,13 +369,13 @@ sigspec:
 	TOK_ID '[' TOK_INT ']' {
 		if (current_module->wires.count($1) == 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
-		$$ = new RTLIL::SigSpec(current_module->wires[$1], 1, $3);
+		$$ = new RTLIL::SigSpec(RTLIL::SigSpec::grml(current_module->wires[$1], $3));
 		free($1);
 	} |
 	TOK_ID '[' TOK_INT ':' TOK_INT ']' {
 		if (current_module->wires.count($1) == 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
-		$$ = new RTLIL::SigSpec(current_module->wires[$1], $3 - $5 + 1, $5);
+		$$ = new RTLIL::SigSpec(RTLIL::SigSpec::grml(current_module->wires[$1], $5, $3 - $5 + 1));
 		free($1);
 	} |
 	'{' sigspec_list '}' {
-- 
cgit v1.2.3


From ec923652e2eb721aa16657e54a67666f855c3d65 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Wed, 23 Jul 2014 09:48:26 +0200
Subject: Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor --
 step 3/3

---
 frontends/ilang/parser.y | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index dcb51d44d..3fe5199f3 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -369,13 +369,13 @@ sigspec:
 	TOK_ID '[' TOK_INT ']' {
 		if (current_module->wires.count($1) == 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
-		$$ = new RTLIL::SigSpec(RTLIL::SigSpec::grml(current_module->wires[$1], $3));
+		$$ = new RTLIL::SigSpec(current_module->wires[$1], $3);
 		free($1);
 	} |
 	TOK_ID '[' TOK_INT ':' TOK_INT ']' {
 		if (current_module->wires.count($1) == 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
-		$$ = new RTLIL::SigSpec(RTLIL::SigSpec::grml(current_module->wires[$1], $5, $3 - $5 + 1));
+		$$ = new RTLIL::SigSpec(current_module->wires[$1], $5, $3 - $5 + 1);
 		free($1);
 	} |
 	'{' sigspec_list '}' {
-- 
cgit v1.2.3


From b17d6531c833f9064c5888c694aa24e8a395b72a Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Thu, 24 Jul 2014 17:15:01 +0200
Subject: Added "make PRETTY=1"

---
 frontends/ilang/Makefile.inc | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/Makefile.inc b/frontends/ilang/Makefile.inc
index f81c8de91..e832cfed8 100644
--- a/frontends/ilang/Makefile.inc
+++ b/frontends/ilang/Makefile.inc
@@ -5,13 +5,13 @@ GENFILES += frontends/ilang/parser.output
 GENFILES += frontends/ilang/lexer.cc
 
 frontends/ilang/parser.tab.cc: frontends/ilang/parser.y
-	bison -d -r all -b frontends/ilang/parser frontends/ilang/parser.y
-	mv frontends/ilang/parser.tab.c frontends/ilang/parser.tab.cc
+	$(P) bison -d -r all -b frontends/ilang/parser frontends/ilang/parser.y
+	$(Q) mv frontends/ilang/parser.tab.c frontends/ilang/parser.tab.cc
 
 frontends/ilang/parser.tab.h: frontends/ilang/parser.tab.cc
 
 frontends/ilang/lexer.cc: frontends/ilang/lexer.l
-	flex -o frontends/ilang/lexer.cc frontends/ilang/lexer.l
+	$(P) flex -o frontends/ilang/lexer.cc frontends/ilang/lexer.l
 
 OBJS += frontends/ilang/parser.tab.o frontends/ilang/lexer.o
 OBJS += frontends/ilang/ilang_frontend.o
-- 
cgit v1.2.3


From 2bec47a4045d23d46e7d300cbf80b2dce1a549a9 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 25 Jul 2014 15:05:18 +0200
Subject: Use only module->addCell() and module->remove() to create and delete
 cells

---
 frontends/ilang/parser.y | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index 3fe5199f3..82826a35a 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -182,11 +182,8 @@ cell_stmt:
 	TOK_CELL TOK_ID TOK_ID EOL {
 		if (current_module->cells.count($3) != 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of cell %s.", $3).c_str());
-		current_cell = new RTLIL::Cell;
-		current_cell->type = $2;
-		current_cell->name = $3;
+		current_cell = current_module->addCell($3, $2);
 		current_cell->attributes = attrbuf;
-		current_module->cells[$3] = current_cell;
 		attrbuf.clear();
 		free($2);
 		free($3);
-- 
cgit v1.2.3


From cc4f10883bcc5f0a3c1b4f0937e60be3c6a1b121 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 26 Jul 2014 11:58:03 +0200
Subject: Renamed RTLIL::{Module,Cell}::connections to connections_

---
 frontends/ilang/parser.y | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index 82826a35a..bb42c5ec7 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -202,9 +202,9 @@ cell_body:
 		delete $5;
 	} |
 	cell_body TOK_CONNECT TOK_ID sigspec EOL {
-		if (current_cell->connections.count($3) != 0)
+		if (current_cell->connections_.count($3) != 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of cell port %s.", $3).c_str());
-		current_cell->connections[$3] = *$4;
+		current_cell->connections_[$3] = *$4;
 		delete $4;
 		free($3);
 	} |
@@ -395,7 +395,7 @@ conn_stmt:
 	TOK_CONNECT sigspec sigspec EOL {
 		if (attrbuf.size() != 0)
 			rtlil_frontend_ilang_yyerror("dangling attribute");
-		current_module->connections.push_back(RTLIL::SigSig(*$2, *$3));
+		current_module->connect(*$2, *$3);
 		delete $2;
 		delete $3;
 	};
-- 
cgit v1.2.3


From b7dda723022ad00c6c0089be888eab319953faa8 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 26 Jul 2014 14:32:50 +0200
Subject: Changed users of cell->connections_ to the new API (sed command)

git grep -l 'connections_' | xargs sed -i -r -e '
	s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
	s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
	s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
	s/(->|\.)connections_.push_back/\1connect/g;
	s/(->|\.)connections_/\1connections()/g;'
---
 frontends/ilang/parser.y | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index bb42c5ec7..a7ce4bc7a 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -202,9 +202,9 @@ cell_body:
 		delete $5;
 	} |
 	cell_body TOK_CONNECT TOK_ID sigspec EOL {
-		if (current_cell->connections_.count($3) != 0)
+		if (current_cell->connections().count($3) != 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of cell port %s.", $3).c_str());
-		current_cell->connections_[$3] = *$4;
+		current_cell->connections()[$3] = *$4;
 		delete $4;
 		free($3);
 	} |
-- 
cgit v1.2.3


From f8fdc47d3361c1a3445a9357ca26cfe75907d6b0 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 26 Jul 2014 15:57:57 +0200
Subject: Manual fixes for new cell connections API

---
 frontends/ilang/parser.y | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index a7ce4bc7a..952dd6a3a 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -204,7 +204,7 @@ cell_body:
 	cell_body TOK_CONNECT TOK_ID sigspec EOL {
 		if (current_cell->connections().count($3) != 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of cell port %s.", $3).c_str());
-		current_cell->connections()[$3] = *$4;
+		current_cell->set($3, *$4);
 		delete $4;
 		free($3);
 	} |
-- 
cgit v1.2.3


From 97a59851a6c411ccb06162d4b31725bf89262378 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 26 Jul 2014 16:11:28 +0200
Subject: Added RTLIL::Cell::has(portname)

---
 frontends/ilang/parser.y | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index 952dd6a3a..09437a0aa 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -202,7 +202,7 @@ cell_body:
 		delete $5;
 	} |
 	cell_body TOK_CONNECT TOK_ID sigspec EOL {
-		if (current_cell->connections().count($3) != 0)
+		if (current_cell->has($3))
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of cell port %s.", $3).c_str());
 		current_cell->set($3, *$4);
 		delete $4;
-- 
cgit v1.2.3


From 946ddff9cef3ea0b4dad8664319fb13074133775 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 26 Jul 2014 20:12:50 +0200
Subject: Changed a lot of code to the new RTLIL::Wire constructors

---
 frontends/ilang/parser.y | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index 09437a0aa..20490e0d2 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -121,14 +121,13 @@ autoidx_stmt:
 
 wire_stmt:
 	TOK_WIRE {
-		current_wire = new RTLIL::Wire;
+		current_wire = current_module->addWire("$__ilang_frontend_tmp__");
 		current_wire->attributes = attrbuf;
 		attrbuf.clear();
 	} wire_options TOK_ID EOL {
 		if (current_module->wires.count($4) != 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of wire %s.", $4).c_str());
-		current_wire->name = $4;
-		current_module->wires[$4] = current_wire;
+		current_module->rename(current_wire, $4);
 		free($4);
 	};
 
-- 
cgit v1.2.3


From 6b34215efde97fe4f1e6ecffb398455f609a9a49 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sun, 27 Jul 2014 11:56:35 +0200
Subject: Fixed ilang parser for new RTLIL API

---
 frontends/ilang/parser.y | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index 20490e0d2..a594adfb5 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -87,12 +87,12 @@ design:
 
 module:
 	TOK_MODULE TOK_ID EOL {
-		if (current_design->modules.count($2) != 0)
+		if (current_design->modules_.count($2) != 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of module %s.", $2).c_str());
 		current_module = new RTLIL::Module;
 		current_module->name = $2;
 		current_module->attributes = attrbuf;
-		current_design->modules[$2] = current_module;
+		current_design->modules_[$2] = current_module;
 		attrbuf.clear();
 		free($2);
 	} module_body TOK_END {
@@ -125,7 +125,7 @@ wire_stmt:
 		current_wire->attributes = attrbuf;
 		attrbuf.clear();
 	} wire_options TOK_ID EOL {
-		if (current_module->wires.count($4) != 0)
+		if (current_module->wires_.count($4) != 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of wire %s.", $4).c_str());
 		current_module->rename(current_wire, $4);
 		free($4);
@@ -179,7 +179,7 @@ memory_options:
 
 cell_stmt:
 	TOK_CELL TOK_ID TOK_ID EOL {
-		if (current_module->cells.count($3) != 0)
+		if (current_module->cells_.count($3) != 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of cell %s.", $3).c_str());
 		current_cell = current_module->addCell($3, $2);
 		current_cell->attributes = attrbuf;
@@ -357,21 +357,21 @@ sigspec:
 		delete $1;
 	} |
 	TOK_ID {
-		if (current_module->wires.count($1) == 0)
+		if (current_module->wires_.count($1) == 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
-		$$ = new RTLIL::SigSpec(current_module->wires[$1]);
+		$$ = new RTLIL::SigSpec(current_module->wires_[$1]);
 		free($1);
 	} |
 	TOK_ID '[' TOK_INT ']' {
-		if (current_module->wires.count($1) == 0)
+		if (current_module->wires_.count($1) == 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
-		$$ = new RTLIL::SigSpec(current_module->wires[$1], $3);
+		$$ = new RTLIL::SigSpec(current_module->wires_[$1], $3);
 		free($1);
 	} |
 	TOK_ID '[' TOK_INT ':' TOK_INT ']' {
-		if (current_module->wires.count($1) == 0)
+		if (current_module->wires_.count($1) == 0)
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: wire %s not found", $1).c_str());
-		$$ = new RTLIL::SigSpec(current_module->wires[$1], $5, $3 - $5 + 1);
+		$$ = new RTLIL::SigSpec(current_module->wires_[$1], $5, $3 - $5 + 1);
 		free($1);
 	} |
 	'{' sigspec_list '}' {
-- 
cgit v1.2.3


From 3c45277ee0f5822181c6058f679de632f834e7d2 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Mon, 28 Jul 2014 12:12:13 +0200
Subject: Added wire->upto flag for signals such as "wire [0:7] x;"

---
 frontends/ilang/lexer.l  | 1 +
 frontends/ilang/parser.y | 5 ++++-
 2 files changed, 5 insertions(+), 1 deletion(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/lexer.l b/frontends/ilang/lexer.l
index c40b81af8..f3bdeb1a4 100644
--- a/frontends/ilang/lexer.l
+++ b/frontends/ilang/lexer.l
@@ -51,6 +51,7 @@
 "wire"		{ return TOK_WIRE; }
 "memory"	{ return TOK_MEMORY; }
 "width"		{ return TOK_WIDTH; }
+"upto"		{ return TOK_UPTO; }
 "offset"	{ return TOK_OFFSET; }
 "size"		{ return TOK_SIZE; }
 "input"		{ return TOK_INPUT; }
diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index a594adfb5..38d3054b2 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -54,7 +54,7 @@ using namespace ILANG_FRONTEND;
 %token TOK_CELL TOK_CONNECT TOK_SWITCH TOK_CASE TOK_ASSIGN TOK_SYNC
 %token TOK_LOW TOK_HIGH TOK_POSEDGE TOK_NEGEDGE TOK_EDGE TOK_ALWAYS TOK_INIT
 %token TOK_UPDATE TOK_PROCESS TOK_END TOK_INVALID TOK_EOL TOK_OFFSET
-%token TOK_PARAMETER TOK_ATTRIBUTE TOK_MEMORY TOK_SIZE TOK_SIGNED
+%token TOK_PARAMETER TOK_ATTRIBUTE TOK_MEMORY TOK_SIZE TOK_SIGNED TOK_UPTO
 
 %type <sigspec> sigspec sigspec_list
 %type <integer> sync_type
@@ -135,6 +135,9 @@ wire_options:
 	wire_options TOK_WIDTH TOK_INT {
 		current_wire->width = $3;
 	} |
+	wire_options TOK_UPTO {
+		current_wire->upto = true;
+	} |
 	wire_options TOK_OFFSET TOK_INT {
 		current_wire->start_offset = $3;
 	} |
-- 
cgit v1.2.3


From 1cb25c05b37b0172dbc50e140fe20f25d973dd8a Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Thu, 31 Jul 2014 13:19:47 +0200
Subject: Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace

---
 frontends/ilang/ilang_frontend.cc | 4 ++++
 frontends/ilang/ilang_frontend.h  | 6 +++++-
 frontends/ilang/parser.y          | 9 ++++++---
 3 files changed, 15 insertions(+), 4 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/ilang_frontend.cc b/frontends/ilang/ilang_frontend.cc
index 572a35720..2d4b99c52 100644
--- a/frontends/ilang/ilang_frontend.cc
+++ b/frontends/ilang/ilang_frontend.cc
@@ -26,6 +26,8 @@
 #include "kernel/register.h"
 #include "kernel/log.h"
 
+YOSYS_NAMESPACE_BEGIN
+
 void rtlil_frontend_ilang_yyerror(char const *s)
 {
 	log_error("Parser error in line %d: %s\n", rtlil_frontend_ilang_yyget_lineno(), s);
@@ -57,3 +59,5 @@ struct IlangFrontend : public Frontend {
 	}
 } IlangFrontend;
 
+YOSYS_NAMESPACE_END
+
diff --git a/frontends/ilang/ilang_frontend.h b/frontends/ilang/ilang_frontend.h
index 5e768c3b9..317ec0d51 100644
--- a/frontends/ilang/ilang_frontend.h
+++ b/frontends/ilang/ilang_frontend.h
@@ -25,14 +25,18 @@
 #ifndef ILANG_FRONTEND_H
 #define ILANG_FRONTEND_H
 
-#include "kernel/rtlil.h"
+#include "kernel/yosys.h"
 #include <stdio.h>
 
+YOSYS_NAMESPACE_BEGIN
+
 namespace ILANG_FRONTEND {
 	void ilang_frontend(FILE *f, RTLIL::Design *design);
 	extern RTLIL::Design *current_design;
 }
 
+YOSYS_NAMESPACE_END
+
 extern int rtlil_frontend_ilang_yydebug;
 int rtlil_frontend_ilang_yylex(void);
 void rtlil_frontend_ilang_yyerror(char const *s);
diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index 38d3054b2..ab763b2b1 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -25,6 +25,7 @@
 %{
 #include <list>
 #include "ilang_frontend.h"
+YOSYS_NAMESPACE_BEGIN
 namespace ILANG_FRONTEND {
 	RTLIL::Design *current_design;
 	RTLIL::Module *current_module;
@@ -37,6 +38,8 @@ namespace ILANG_FRONTEND {
 	std::map<RTLIL::IdString, RTLIL::Const> attrbuf;
 }
 using namespace ILANG_FRONTEND;
+YOSYS_NAMESPACE_END
+USING_YOSYS_NAMESPACE
 %}
 
 %name-prefix "rtlil_frontend_ilang_yy"
@@ -44,8 +47,8 @@ using namespace ILANG_FRONTEND;
 %union {
 	char *string;
 	int integer;
-	RTLIL::Const *data;
-	RTLIL::SigSpec *sigspec;
+	YOSYS_NAMESPACE_PREFIX RTLIL::Const *data;
+	YOSYS_NAMESPACE_PREFIX RTLIL::SigSpec *sigspec;
 }
 
 %token <string> TOK_ID TOK_VALUE TOK_STRING
@@ -116,7 +119,7 @@ attr_stmt:
 
 autoidx_stmt:
 	TOK_AUTOIDX TOK_INT EOL {
-		RTLIL::autoidx = std::max(RTLIL::autoidx, $2);
+		autoidx = std::max(autoidx, $2);
 	};
 
 wire_stmt:
-- 
cgit v1.2.3


From e6d33513a5b809facc6e3e5e75d2248bfa94f82b Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Thu, 31 Jul 2014 14:11:39 +0200
Subject: Added module->design and cell->module, wire->module pointers

---
 frontends/ilang/parser.y | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index ab763b2b1..67cc7da78 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -90,12 +90,12 @@ design:
 
 module:
 	TOK_MODULE TOK_ID EOL {
-		if (current_design->modules_.count($2) != 0)
+		if (current_design->has($2))
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of module %s.", $2).c_str());
 		current_module = new RTLIL::Module;
 		current_module->name = $2;
 		current_module->attributes = attrbuf;
-		current_design->modules_[$2] = current_module;
+		current_design->add(current_module);
 		attrbuf.clear();
 		free($2);
 	} module_body TOK_END {
-- 
cgit v1.2.3


From cdae8abe16847c533171fed111beea7b52202cce Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Thu, 31 Jul 2014 16:38:54 +0200
Subject: Renamed port access function on RTLIL::Cell, added param access
 functions

---
 frontends/ilang/parser.y | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index 67cc7da78..f696140eb 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -207,9 +207,9 @@ cell_body:
 		delete $5;
 	} |
 	cell_body TOK_CONNECT TOK_ID sigspec EOL {
-		if (current_cell->has($3))
+		if (current_cell->hasPort($3))
 			rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of cell port %s.", $3).c_str());
-		current_cell->set($3, *$4);
+		current_cell->setPort($3, *$4);
 		delete $4;
 		free($3);
 	} |
-- 
cgit v1.2.3


From 1bf7a18fec76cf46a5b8710a75371e23b68d147d Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Thu, 14 Aug 2014 16:13:42 +0200
Subject: Added module->ports

---
 frontends/ilang/parser.y | 1 +
 1 file changed, 1 insertion(+)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index f696140eb..e1ef39a55 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -101,6 +101,7 @@ module:
 	} module_body TOK_END {
 		if (attrbuf.size() != 0)
 			rtlil_frontend_ilang_yyerror("dangling attribute");
+		current_module->fixup_ports();
 	} EOL;
 
 module_body:
-- 
cgit v1.2.3


From 19cff41eb4261b20374058f16807a229af46f304 Mon Sep 17 00:00:00 2001
From: Clifford Wolf <clifford@clifford.at>
Date: Sat, 23 Aug 2014 15:03:55 +0200
Subject: Changed frontend-api from FILE to std::istream

---
 frontends/ilang/ilang_frontend.cc | 5 +++--
 frontends/ilang/ilang_frontend.h  | 5 ++---
 frontends/ilang/lexer.l           | 5 ++++-
 frontends/ilang/parser.y          | 1 +
 4 files changed, 10 insertions(+), 6 deletions(-)

(limited to 'frontends/ilang')

diff --git a/frontends/ilang/ilang_frontend.cc b/frontends/ilang/ilang_frontend.cc
index 2d4b99c52..f6f926db1 100644
--- a/frontends/ilang/ilang_frontend.cc
+++ b/frontends/ilang/ilang_frontend.cc
@@ -45,15 +45,16 @@ struct IlangFrontend : public Frontend {
 		log("representation of a design in yosys's internal format.)\n");
 		log("\n");
 	}
-	virtual void execute(FILE *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
+	virtual void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
 	{
 		log_header("Executing ILANG frontend.\n");
 		extra_args(f, filename, args, 1);
 		log("Input filename: %s\n", filename.c_str());
 
+		ILANG_FRONTEND::lexin = f;
 		ILANG_FRONTEND::current_design = design;
 		rtlil_frontend_ilang_yydebug = false;
-		rtlil_frontend_ilang_yyrestart(f);
+		rtlil_frontend_ilang_yyrestart(NULL);
 		rtlil_frontend_ilang_yyparse();
 		rtlil_frontend_ilang_yylex_destroy();
 	}
diff --git a/frontends/ilang/ilang_frontend.h b/frontends/ilang/ilang_frontend.h
index 317ec0d51..b04d6c512 100644
--- a/frontends/ilang/ilang_frontend.h
+++ b/frontends/ilang/ilang_frontend.h
@@ -26,12 +26,11 @@
 #define ILANG_FRONTEND_H
 
 #include "kernel/yosys.h"
-#include <stdio.h>
 
 YOSYS_NAMESPACE_BEGIN
 
 namespace ILANG_FRONTEND {
-	void ilang_frontend(FILE *f, RTLIL::Design *design);
+	extern std::istream *lexin;
 	extern RTLIL::Design *current_design;
 }
 
@@ -42,7 +41,7 @@ int rtlil_frontend_ilang_yylex(void);
 void rtlil_frontend_ilang_yyerror(char const *s);
 void rtlil_frontend_ilang_yyrestart(FILE *f);
 int rtlil_frontend_ilang_yyparse(void);
-void rtlil_frontend_ilang_yylex_destroy(void);
+int rtlil_frontend_ilang_yylex_destroy(void);
 int rtlil_frontend_ilang_yyget_lineno(void);
 
 #endif
diff --git a/frontends/ilang/lexer.l b/frontends/ilang/lexer.l
index f3bdeb1a4..4109cd4bc 100644
--- a/frontends/ilang/lexer.l
+++ b/frontends/ilang/lexer.l
@@ -29,9 +29,12 @@
 #pragma clang diagnostic ignored "-Wdeprecated-register"
 #endif
 
-#include "kernel/rtlil.h"
+#include "ilang_frontend.h"
 #include "parser.tab.h"
 
+#define YY_INPUT(buf,result,max_size) \
+        result = ILANG_FRONTEND::lexin->readsome(buf, max_size);
+
 %}
 
 %option yylineno
diff --git a/frontends/ilang/parser.y b/frontends/ilang/parser.y
index e1ef39a55..a5cc06898 100644
--- a/frontends/ilang/parser.y
+++ b/frontends/ilang/parser.y
@@ -27,6 +27,7 @@
 #include "ilang_frontend.h"
 YOSYS_NAMESPACE_BEGIN
 namespace ILANG_FRONTEND {
+	std::istream *lexin;
 	RTLIL::Design *current_design;
 	RTLIL::Module *current_module;
 	RTLIL::Wire *current_wire;
-- 
cgit v1.2.3