From fb2bf934dc6d2c969906b350c9a1b09a972bfdd7 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Fri, 3 Jan 2014 00:22:17 +0100 Subject: Added correct handling of $memwr priority --- frontends/ast/genrtlil.cc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'frontends/ast') diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index 1b6fc1d8b..e44b2d361 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -1271,6 +1271,8 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint) cell->parameters["\\CLK_ENABLE"] = RTLIL::Const(0); cell->parameters["\\CLK_POLARITY"] = RTLIL::Const(0); + + cell->parameters["\\PRIORITY"] = RTLIL::Const(RTLIL::autoidx-1); } break; -- cgit v1.2.3