From c80315cea42414216bcc7b62acb2ef9a41b54eab Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Fri, 5 Jan 2018 13:28:45 +0100 Subject: Bugfix in hierarchy handling of blackbox module ports Signed-off-by: Clifford Wolf --- frontends/ast/ast.cc | 2 +- frontends/ast/ast.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'frontends/ast') diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc index be04d5536..037a9f3ee 100644 --- a/frontends/ast/ast.cc +++ b/frontends/ast/ast.cc @@ -1067,7 +1067,7 @@ AstModule::~AstModule() } // create a new parametric module (when needed) and return the name of the generated module -RTLIL::IdString AstModule::derive(RTLIL::Design *design, dict parameters) +RTLIL::IdString AstModule::derive(RTLIL::Design *design, dict parameters, bool) { std::string stripped_name = name.str(); diff --git a/frontends/ast/ast.h b/frontends/ast/ast.h index a5d5ee30a..d1e2c78d1 100644 --- a/frontends/ast/ast.h +++ b/frontends/ast/ast.h @@ -283,7 +283,7 @@ namespace AST AstNode *ast; bool nolatches, nomeminit, nomem2reg, mem2reg, lib, noopt, icells, autowire; virtual ~AstModule(); - virtual RTLIL::IdString derive(RTLIL::Design *design, dict parameters); + virtual RTLIL::IdString derive(RTLIL::Design *design, dict parameters, bool mayfail); virtual RTLIL::Module *clone() const; }; -- cgit v1.2.3