From 8dafecd34d772b1d9ec190b39913b236cdc8fb17 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sun, 24 Nov 2013 20:29:07 +0100 Subject: Added module->avail_parameters (for advanced techmap features) --- frontends/ast/genrtlil.cc | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'frontends/ast') diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index 66b670c7a..f7e7b852c 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -805,7 +805,6 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint) case AST_TASK: case AST_FUNCTION: case AST_AUTOWIRE: - case AST_PARAMETER: case AST_LOCALPARAM: case AST_DEFPARAM: case AST_GENVAR: @@ -814,6 +813,11 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint) case AST_GENIF: break; + // remember the parameter, needed for example in techmap + case AST_PARAMETER: + current_module->avail_parameters.insert(str); + break; + // create an RTLIL::Wire for an AST_WIRE node case AST_WIRE: { if (current_module->wires.count(str) != 0) -- cgit v1.2.3