From fd003e0e975be3c7f357fb151fd1c83a8ea9b0ae Mon Sep 17 00:00:00 2001
From: Stefan Biereigel <stefan.biereigel@cern.ch>
Date: Thu, 23 May 2019 13:42:30 +0200
Subject: fix indentation across files

---
 frontends/ast/ast.cc | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

(limited to 'frontends/ast/ast.cc')

diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc
index 9c360efb6..963152588 100644
--- a/frontends/ast/ast.cc
+++ b/frontends/ast/ast.cc
@@ -51,7 +51,7 @@ namespace AST_INTERNAL {
 	std::map<std::string, AstNode*> current_scope;
 	const dict<RTLIL::SigBit, RTLIL::SigBit> *genRTLIL_subst_ptr = NULL;
 	RTLIL::SigSpec ignoreThisSignalsInInitial;
-    std::map<RTLIL::SigSpec, RTLIL::Cell*> wire_logic_map;
+	std::map<RTLIL::SigSpec, RTLIL::Cell*> wire_logic_map;
 	AstNode *current_always, *current_top_block, *current_block, *current_block_child;
 	AstModule *current_module;
 	bool current_always_clocked;
@@ -195,6 +195,8 @@ AstNode::AstNode(AstNodeType type, AstNode *child1, AstNode *child2, AstNode *ch
 	is_logic = false;
 	is_signed = false;
 	is_string = false;
+	is_wand = false;
+	is_wor = false;
 	was_checked = false;
 	range_valid = false;
 	range_swapped = false;
@@ -941,7 +943,7 @@ static AstModule* process_module(AstNode *ast, bool defer, AstNode *original_ast
 		log("--- END OF AST DUMP ---\n");
 	}
 
-    wire_logic_map = std::map<RTLIL::SigSpec, RTLIL::Cell*>();
+	wire_logic_map = std::map<RTLIL::SigSpec, RTLIL::Cell*>();
 
 	if (!defer)
 	{
-- 
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