From e4808477531d31284244188637af3ccf89a21269 Mon Sep 17 00:00:00 2001
From: dh73 <dh73_fpga@qq.com>
Date: Sun, 1 Oct 2017 11:11:32 -0500
Subject: Fixed wrong declaration in Verilog backend
---
backends/verilog/verilog_backend.cc | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
(limited to 'backends')
diff --git a/backends/verilog/verilog_backend.cc b/backends/verilog/verilog_backend.cc
index 33f9a81e4..48e06dc7c 100644
--- a/backends/verilog/verilog_backend.cc
+++ b/backends/verilog/verilog_backend.cc
@@ -175,7 +175,7 @@ void dump_const(std::ostream &f, const RTLIL::Const &data, int width = -1, int o
if (set_signed && val < 0)
f << stringf("-32'sd%u", -val);
else {
- if(!nobasenradix)
+ if(nobasenradix)
f << stringf("%u", val); // There's no signed parameter on megawizard IP
else
f << stringf("32'%sd%u", set_signed ? "s" : "", val);
@@ -1585,8 +1585,8 @@ struct VerilogBackend : public Backend {
continue;
}
if (arg == "-nobasenradix") {
- defparam = true;
- continue;
+ nobasenradix = true;
+ continue;
}
if (arg == "-blackboxes") {
blackboxes = true;
--
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