From 450ad0e9ba031fbeef904746ca773e3b0e21af8f Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 22 Nov 2019 15:35:08 -0800 Subject: Add to CHANGELOG --- CHANGELOG | 1 + 1 file changed, 1 insertion(+) (limited to 'CHANGELOG') diff --git a/CHANGELOG b/CHANGELOG index a49c27b05..d9d261fbc 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -53,6 +53,7 @@ Yosys 0.9 .. Yosys 0.9-dev - Added "check -mapped" - Added checking of SystemVerilog always block types (always_comb, always_latch and always_ff) + - Added "clkpart" pass Yosys 0.8 .. Yosys 0.9 ---------------------- -- cgit v1.2.3 From fce6bad6ae22a3e14115202b05b50ae4a69b5a93 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Thu, 12 Dec 2019 15:02:46 -0800 Subject: Remove 'clkpart' entry in CHANGELOG --- CHANGELOG | 1 - 1 file changed, 1 deletion(-) (limited to 'CHANGELOG') diff --git a/CHANGELOG b/CHANGELOG index d9d261fbc..a49c27b05 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -53,7 +53,6 @@ Yosys 0.9 .. Yosys 0.9-dev - Added "check -mapped" - Added checking of SystemVerilog always block types (always_comb, always_latch and always_ff) - - Added "clkpart" pass Yosys 0.8 .. Yosys 0.9 ---------------------- -- cgit v1.2.3 From ece423415cbc17654c6ac81a0f4b15783c558660 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Mon, 30 Dec 2019 14:24:58 -0800 Subject: Add CHANGELOG entry, add abc9_{flop,keep} attr to README.md --- CHANGELOG | 1 + 1 file changed, 1 insertion(+) (limited to 'CHANGELOG') diff --git a/CHANGELOG b/CHANGELOG index 01ae17c2b..fc0cdc92e 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -57,6 +57,7 @@ Yosys 0.9 .. Yosys 0.9-dev always_latch and always_ff) - Added "xilinx_dffopt" pass - Added "scratchpad" pass + - Added "synth_xilinx -dff" Yosys 0.8 .. Yosys 0.9 ---------------------- -- cgit v1.2.3