iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Use equiv_opt for latches	Eddie Hung	2019-08-28	2	-58/+10
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*	Merge remote-tracking branch 'origin/clifford/async2synclatch' into ↵	Eddie Hung	2019-08-28	11	-9/+251
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\| *	Merge pull request #1325 from YosysHQ/eddie/sat_init	Clifford Wolf	2019-08-28	1	-1/+7
\| \|\ \| \| \| \| \| \|	In sat: 'x' in init attr should be ignored
\| \| *	Revert to using clean	Eddie Hung	2019-08-27	1	-1/+1
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\| \| *	Wire with init on FF part, 1'bx on non-FF part	Eddie Hung	2019-08-24	1	-1/+3
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\| \| *	Blocking assignment	Eddie Hung	2019-08-23	1	-1/+1
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\| \| *	In sat: 'x' in init attr should not override constant	Eddie Hung	2019-08-22	2	-1/+5
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\| * \|	improve clkbuf_inhibit propagation upwards through hierarchy	Marcin Kościelnicki	2019-08-27	1	-5/+33
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\| * \|	Improve tests to check that clkbuf is connected to expected	Eddie Hung	2019-08-26	1	-6/+21
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\| * \|	Check clkbuf_inhibit=1 is ignored for custom selection	Eddie Hung	2019-08-23	1	-0/+1
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\| * \|	Add simple clkbufmap tests	Eddie Hung	2019-08-23	1	-0/+52
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\| * \|	tests/techmap/run-test.sh to cope with *.ys	Eddie Hung	2019-08-23	2	-7/+18
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\| * \|	Do not propagate mem2reg attribute through to result	Eddie Hung	2019-08-22	1	-0/+1
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\| *	Merge pull request #1317 from YosysHQ/eddie/opt_expr_shiftx	Eddie Hung	2019-08-22	1	-0/+70
\| \|\ \| \| \| \| \| \|	opt_expr to trim A port of $shiftx/$shift
\| \| *	Respect opt_expr -keepdc as per @cliffordwolf	Eddie Hung	2019-08-22	1	-0/+14
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\| \| *	Handle $shift and Y_WIDTH > 1 as per @cliffordwolf	Eddie Hung	2019-08-22	1	-1/+43
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\| \| *	Add test	Eddie Hung	2019-08-21	1	-0/+14
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\| * \|	mem2reg to preserve user attributes and src	Eddie Hung	2019-08-21	1	-0/+13
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\| *	Add test	Eddie Hung	2019-08-20	3	-0/+15
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\| *	Merge branch 'master' into clifford/pmgen	Clifford Wolf	2019-08-20	6	-1/+46
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\| \| *	Add test case for real parameters	Clifford Wolf	2019-08-20	1	-1/+10
\| \| \| \| \| \| \| \| \| \| \| \|	Signed-off-by: Clifford Wolf <clifford@clifford.at>
\| * \|	Merge branch 'master' of github.com:YosysHQ/yosys into clifford/pmgen	Clifford Wolf	2019-08-19	39	-68/+534
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\| * \| \|	Add test for pmtest_test "reduce" demo pattern	Clifford Wolf	2019-08-17	1	-0/+21
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Signed-off-by: Clifford Wolf <clifford@clifford.at>
* \| \| \|	Revert "Add tests for ecp5"	SergeyDegtyar	2019-08-28	30	-862/+0
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This reverts commit 2270ead09fb4695442c66fe5c06445235f390f2b.
* \| \| \|	Add tests for ecp5	SergeyDegtyar	2019-08-28	30	-0/+862
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* \| \| \|	Revert "Add tests for ecp5 architecture."	SergeyDegtyar	2019-08-27	30	-864/+0
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This reverts commit 134d3fea909bae02f4f814e3d649658502b44b73.
* \| \| \|	Add tests for ecp5 architecture.	SergeyDegtyar	2019-08-27	30	-0/+864
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* \| \| \|	Add tests for macc and rom;	SergeyDegtyar	2019-08-27	4	-0/+55
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Test cases from https://www.latticesemi.com/-/media/LatticeSemi/Documents/UserManuals/EI/iCEcube201701UserGuide.ashx?document_id=52071; In both cases synthesized only LUTs and DFFs.
* \| \| \|	Fix pull request	SergeyDegtyar	2019-08-23	2	-7/+9
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* \| \| \|	Fix run-test.sh; Add new test for dpram.	SergeyDegtyar	2019-08-23	4	-1/+120
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* \| \| \|	Fix path in run-test.sh	SergeyDegtyar	2019-08-23	1	-3/+3
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* \| \| \|	Remove adffs_tb.v	Eddie Hung	2019-08-22	1	-75/+0
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* \| \| \|	WIP for equivalency checking memories	Eddie Hung	2019-08-22	1	-1/+13
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* \| \| \|	Do not print OKAY	Eddie Hung	2019-08-22	2	-4/+0
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* \| \| \|	Fail if iverilog fails	Eddie Hung	2019-08-22	1	-2/+2
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* \| \| \|	Hide tri-state warning message for now	Eddie Hung	2019-08-22	2	-1/+2
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* \| \| \|	Remove unused output	Eddie Hung	2019-08-22	1	-1/+1
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* \| \| \|	Fix tribuf test	Eddie Hung	2019-08-22	1	-1/+1
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* \| \| \|	Fix comments	Eddie Hung	2019-08-22	8	-10/+11
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* \| \| \|	Remove tech independent synthesis	Eddie Hung	2019-08-22	9	-16/+20
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* \| \| \|	Remove dffe instantation	Eddie Hung	2019-08-22	1	-7/+0
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* \| \| \|	Move $dffe to dffs.{v,ys}	Eddie Hung	2019-08-22	4	-18/+41
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* \| \| \|	Make multiplier wider, do not do tech independent synth	Eddie Hung	2019-08-22	2	-8/+6
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* \| \| \|	Fix all comments from PR	SergeyDegtyar	2019-08-21	20	-160/+465
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* \| \| \|	Add temp directory	SergeyDegtyar	2019-08-21	1	-0/+1
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* \| \| \|	Fix tests; Remove simulation;	SergeyDegtyar	2019-08-20	26	-519/+33
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	- Add -map and -assert options for equiv_opt; !!! '-assert' option was commented for the next tests (unproven $equiv cells was found): - dffs; - div_mod; - latches; - mul_pow; - Add design -load; - Remove simulations;
* \| \| \|	Add new tests for ice40 architecture	SergeyDegtyar	2019-08-20	27	-0/+900
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* \| \|	proc_clean: fix order of switch insertion.	whitequark	2019-08-19	4	-0/+35
\| \| \| \| \| \| \| \| \| \| \| \|	Fixes #1268.
* \| \|	Add *.sv to tests/simple_abc9/.gitignore	Clifford Wolf	2019-08-19	1	-0/+1
\| \|/ \|/\| \| \| \| \|	Signed-off-by: Clifford Wolf <clifford@clifford.at>
* \|	Merge remote-tracking branch 'origin/master' into clifford/testfast	Eddie Hung	2019-08-18	32	-29/+485
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