| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | intel_alm: add Cyclone 10 GX tests | Dan Ravensloft | 2020-07-05 | 11 | -2/+236 |
| * | intel_alm: DSP inference | Dan Ravensloft | 2020-07-05 | 1 | -0/+23 |
| * | synth_intel_alm: Use dfflegalize. | Marcelina Kościelnicka | 2020-07-04 | 1 | -1/+1 |
| * | Improve MISTRAL_FF specify rules | Dan Ravensloft | 2020-07-04 | 1 | -1/+2 |
| * | tests: update fsm.ys resource count | Eddie Hung | 2020-07-04 | 1 | -4/+4 |
| * | intel_alm: fix DFFE matching | Dan Ravensloft | 2020-06-11 | 2 | -4/+4 |
| * | Add missing .gitignore file | Claire Wolf | 2020-06-04 | 1 | -0/+2 |
| * | intel_alm: direct LUTRAM cell instantiation | Dan Ravensloft | 2020-05-07 | 1 | -0/+20 |
| * | intel_alm: work around a Quartus ICE | Dan Ravensloft | 2020-04-23 | 1 | -0/+12 |
| * | synth_intel_alm: alternative synthesis for Intel FPGAs | Dan Ravensloft | 2020-04-15 | 10 | -0/+208 |
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index : iCE40/yosys | |
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