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path: root/techlibs/xilinx/cells_map.v
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* Less thinkingEddie Hung2019-07-081-3/+3
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* RewordEddie Hung2019-07-081-2/+2
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* Map $__XILINX_SHIFTX in a more balanced mannerEddie Hung2019-07-081-36/+49
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* Fixes for 2:1 muxesEddie Hung2019-07-081-4/+29
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* Revert "Fix broken MUXFx box, use MUXF7x2 box instead"Eddie Hung2019-07-011-29/+29
| | | | This reverts commit a9a140aa6c84e71edc1a244cfe363400c7e09d90.
* Fix broken MUXFx box, use MUXF7x2 box insteadEddie Hung2019-07-011-29/+29
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* Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-291-16/+6
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* | Restore $__XILINX_MUXF78 const optimisationEddie Hung2019-06-281-24/+24
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* | Clean up trimming leading 1'bx in A during techmappnigEddie Hung2019-06-281-15/+9
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* | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-06-281-4/+2
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| * Reduce diff with upstreamEddie Hung2019-06-271-4/+2
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* | This optimisation doesn't seem to work...Eddie Hung2019-06-251-24/+24
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* | Reduce MuxFx resources in mux techmappingEddie Hung2019-06-241-10/+30
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* | Reduce number of decomposed muxes during techmapEddie Hung2019-06-241-14/+11
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* | Revert "Fix techmapping muxes some more"Eddie Hung2019-06-241-4/+4
| | | | | | | | This reverts commit 0aae3b4f4361db6d2c6b9c8d69df041f40519cec.
* | Fix techmapping muxes some moreEddie Hung2019-06-241-4/+4
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* | Fix mux techmappingEddie Hung2019-06-241-19/+20
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* | Change synth_xilinx's -nomux to -minmuxf <int>Eddie Hung2019-06-241-25/+41
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* | Fix spacingEddie Hung2019-06-211-3/+3
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* | Add $__XILINX_MUXF78 to preserve entire boxEddie Hung2019-06-211-4/+12
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* | Revert "Remove wide mux inference"Eddie Hung2019-06-141-0/+120
|/ | | | This reverts commit 738fdfe8f55e18ac7f315cd68c117eae370004ca.
* Fix name clashEddie Hung2019-06-131-4/+8
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* Move neg-pol to pos-pol mapping from ff_map to cells_map.vEddie Hung2019-06-121-0/+8
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* Remove wide mux inferenceEddie Hung2019-06-121-120/+0
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* $__XILINX_MUX_ -> $__XILINX_SHIFTXEddie Hung2019-06-061-9/+9
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* Fix muxcover and its techmappingEddie Hung2019-06-061-2/+2
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* Run muxpack and muxcover in synth_xilinxEddie Hung2019-06-061-0/+12
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* CleanupEddie Hung2019-06-051-10/+0
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* Fix name clashEddie Hung2019-06-041-11/+11
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* Add mux_map.v for wide muxEddie Hung2019-06-041-21/+14
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* Fix/workaround symptom unveiled by #1023Eddie Hung2019-05-211-4/+14
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* Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-05-211-6/+8
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| * Rename cells_map.v to prevent clash with ff_map.vEddie Hung2019-05-031-6/+8
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* | Trim off leading 1'bx in AEddie Hung2019-05-021-7/+20
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* | Add don't care optimisationEddie Hung2019-05-021-0/+11
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* | Revert to pre-muxcover approachEddie Hung2019-05-021-17/+77
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* | Merge remote-tracking branch 'origin/master' into xc7muxEddie Hung2019-05-021-0/+8
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| * Move neg-pol to pos-pol mapping from ff_map to cells_map.vEddie Hung2019-04-281-0/+8
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* | Fix spacingEddie Hung2019-04-261-4/+4
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* | Try a different approach with 'muxcover'Eddie Hung2019-04-261-67/+15
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* | Cleanup supersededEddie Hung2019-04-251-11/+1
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* | TweakEddie Hung2019-04-221-1/+1
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* | Fix for A_WIDTH == 2 but B_WIDTH==3Eddie Hung2019-04-221-1/+1
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* | Trim A_WIDTH by Y_WIDTH-1Eddie Hung2019-04-221-1/+1
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* | Add commentEddie Hung2019-04-221-0/+3
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* | Fix for mux_case_* mappingsEddie Hung2019-04-221-17/+9
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* | Fix for non-pow2 width muxesEddie Hung2019-04-221-9/+18
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* | Add synth_xilinx -nomux optionEddie Hung2019-04-221-0/+2
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* | Merge remote-tracking branch 'origin/xc7srl' into xc7muxEddie Hung2019-04-221-0/+125
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| * Call shregmap twice -- once for variable, another for fixedEddie Hung2019-04-051-0/+3
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