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* Merge pull request #1108 from YosysHQ/clifford/fix1091Eddie Hung2019-06-211-45/+99
|\ | | | | Add support for partial matches to muxcover
| * Replace "muxcover -freedecode" with "muxcover -dmux=cost"Clifford Wolf2019-06-211-15/+14
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Add "muxcover -freedecode"Clifford Wolf2019-06-211-0/+14
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Improvements in muxcoverClifford Wolf2019-06-201-38/+55
| | | | | | | | | | | | | | - Slightly under-estimate cost of decoder muxes - Prefer larger muxes at tree root at same cost - Don't double-count input cost for partial muxes - Add debug log output
| * Add support for partial matches to muxcover, fixes #1091Clifford Wolf2019-06-201-7/+31
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Merge pull request #1085 from YosysHQ/eddie/shregmap_improveEddie Hung2019-06-211-3/+15
|\ \ | | | | | | Improve shregmap to handle case where first flop is common to two chains
| * | Actually, there might not be any harm in updating sigmap...Eddie Hung2019-06-201-3/+1
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| * | Add comment as per @cliffordwolfEddie Hung2019-06-201-0/+11
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| * | Revert "Try way that doesn't involve creating a new wire"Eddie Hung2019-06-111-15/+10
| | | | | | | | | | | | This reverts commit 2f427acc9ed23c77e89386f4fbf53ac580bf0f0b.
| * | Try way that doesn't involve creating a new wireEddie Hung2019-06-111-10/+15
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| * | If d_bit already in sigbit_chain_next, create extra wireEddie Hung2019-06-101-3/+6
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* | | Merge pull request #1117 from bwidawsk/more-homeClifford Wolf2019-06-211-0/+4
|\ \ \ | |_|/ |/| | Add a few more filename rewrites
| * | Add a few more filename rewritesBen Widawsky2019-06-201-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This now allows a full pipeline to work, something such as: yosys -p "synth_ecp5 -json ~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v" Otherwise, you will get something along the lines of: ERROR: Can't open output file `~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v' for writing: No such file or directory Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
* | | Fix typo, fixes #1095Clifford Wolf2019-06-201-1/+1
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | Improve shregmap help message, fixes #1113Clifford Wolf2019-06-201-0/+2
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | Fix typoClifford Wolf2019-06-201-2/+2
|/ / | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Fixed the help summary line for a few commandsacw12512019-06-193-5/+5
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* | Fix bug in #1078, add entry to CHANGELOGEddie Hung2019-06-191-3/+3
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* | Use input default values in hierarchy passClifford Wolf2019-06-191-0/+38
|/ | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Allow muxcover costs to be changedEddie Hung2019-06-071-12/+42
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* Merge pull request #1071 from YosysHQ/eddie/fix_1070Clifford Wolf2019-06-061-2/+2
|\ | | | | Fix typo in opt_rmdff causing register to be incorrectly removed
| * Fix typo in opt_rmdffEddie Hung2019-06-051-2/+2
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* | Merge pull request #1072 from YosysHQ/eddie/fix_1069Clifford Wolf2019-06-061-0/+5
|\ \ | | | | | | Error out if no top module given before 'sim'
| * | Error out if no top module given before 'sim'Eddie Hung2019-06-051-0/+5
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* / Missing doc for -tech xilinx in shregmapEddie Hung2019-06-051-0/+3
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* Merge pull request #1067 from YosysHQ/clifford/fix1065Eddie Hung2019-06-051-1/+1
|\ | | | | Suppress driver-driver conflict warning for unknown cell types
| * Suppress driver-driver conflict warning for unknown cell types, fixes #1065Clifford Wolf2019-06-051-1/+1
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Major rewrite of wire selection in setundef -initClifford Wolf2019-06-051-30/+89
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Indent fixClifford Wolf2019-06-051-23/+25
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Merge pull request #999 from jakobwenzel/setundefInitFixClifford Wolf2019-06-051-16/+23
|\ \ | | | | | | initialize more registers in setundef -init
| * | initialize more registers in setundef -initJakob Wenzel2019-05-091-16/+23
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* | | Fix typo in fmcombine log message, fixes #1063Clifford Wolf2019-06-051-2/+2
| |/ |/| | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Fix "tee" handling of log_streamsClifford Wolf2019-05-311-0/+5
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Merge pull request #1049 from YosysHQ/clifford/fix1047Clifford Wolf2019-05-281-4/+11
|\ \ | | | | | | Do not use shiftmul peepopt pattern when mul result is truncated
| * | Do not use shiftmul peepopt pattern when mul result is truncated, fixes #1047Clifford Wolf2019-05-281-4/+11
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | Refactor hierarchy wand/wor handlingClifford Wolf2019-05-281-102/+143
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | Merge branch 'master' into wandworStefan Biereigel2019-05-272-6/+71
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| * | Merge pull request #1026 from YosysHQ/clifford/fix1023Clifford Wolf2019-05-271-2/+3
| |\ \ | | | | | | | | Keep zero-width wires in opt_clean if and only if they are ports
| | * | Keep zero-width wires in opt_clean if and only if they are ports, fixes #1023Clifford Wolf2019-05-221-2/+3
| | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | Revert enable checkEddie Hung2019-05-251-3/+1
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| * | | opt_rmdff to optimise even in presence of enable signal, even removingEddie Hung2019-05-241-12/+29
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| * | | Add commentsEddie Hung2019-05-241-1/+22
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| * | | Resolve @cliffordwolf review, set even if !has_initEddie Hung2019-05-241-2/+1
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| * | | Fix spacingEddie Hung2019-05-231-2/+2
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| * | | opt_rmdff to work on $dffe and $_DFFE_*Eddie Hung2019-05-231-3/+32
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* / / move wand/wor resolution into hierarchy passStefan Biereigel2019-05-271-1/+77
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* | Add "wreduce -keepdc", fixes #1016Clifford Wolf2019-05-201-1/+9
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Improvements in opt_cleanClifford Wolf2019-05-151-10/+10
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Do not leak file descriptors in cover.ccClifford Wolf2019-05-151-5/+6
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Fix two instances of integer-assignment to string.Henner Zeller2019-05-142-2/+3
| | | | | | | | | | | | | | | | | | o In cover.cc, the int-result of mkstemps() was assigned to a string and silently interpreted as a single-character filename with a funny value. Fix with the intent: assign the filename. o in libparse.cc, an int was assigned to a string, but depending on visible constructors, this is ambiguous. Explicitly cast this to a char.