Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Merge pull request #1108 from YosysHQ/clifford/fix1091 | Eddie Hung | 2019-06-21 | 1 | -45/+99 |
|\ | | | | | Add support for partial matches to muxcover | ||||
| * | Replace "muxcover -freedecode" with "muxcover -dmux=cost" | Clifford Wolf | 2019-06-21 | 1 | -15/+14 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Add "muxcover -freedecode" | Clifford Wolf | 2019-06-21 | 1 | -0/+14 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | Improvements in muxcover | Clifford Wolf | 2019-06-20 | 1 | -38/+55 |
| | | | | | | | | | | | | | | - Slightly under-estimate cost of decoder muxes - Prefer larger muxes at tree root at same cost - Don't double-count input cost for partial muxes - Add debug log output | ||||
| * | Add support for partial matches to muxcover, fixes #1091 | Clifford Wolf | 2019-06-20 | 1 | -7/+31 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Merge pull request #1085 from YosysHQ/eddie/shregmap_improve | Eddie Hung | 2019-06-21 | 1 | -3/+15 |
|\ \ | | | | | | | Improve shregmap to handle case where first flop is common to two chains | ||||
| * | | Actually, there might not be any harm in updating sigmap... | Eddie Hung | 2019-06-20 | 1 | -3/+1 |
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| * | | Add comment as per @cliffordwolf | Eddie Hung | 2019-06-20 | 1 | -0/+11 |
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| * | | Revert "Try way that doesn't involve creating a new wire" | Eddie Hung | 2019-06-11 | 1 | -15/+10 |
| | | | | | | | | | | | | This reverts commit 2f427acc9ed23c77e89386f4fbf53ac580bf0f0b. | ||||
| * | | Try way that doesn't involve creating a new wire | Eddie Hung | 2019-06-11 | 1 | -10/+15 |
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| * | | If d_bit already in sigbit_chain_next, create extra wire | Eddie Hung | 2019-06-10 | 1 | -3/+6 |
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* | | | Merge pull request #1117 from bwidawsk/more-home | Clifford Wolf | 2019-06-21 | 1 | -0/+4 |
|\ \ \ | |_|/ |/| | | Add a few more filename rewrites | ||||
| * | | Add a few more filename rewrites | Ben Widawsky | 2019-06-20 | 1 | -0/+4 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This now allows a full pipeline to work, something such as: yosys -p "synth_ecp5 -json ~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v" Otherwise, you will get something along the lines of: ERROR: Can't open output file `~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v' for writing: No such file or directory Signed-off-by: Ben Widawsky <ben@bwidawsk.net> | ||||
* | | | Fix typo, fixes #1095 | Clifford Wolf | 2019-06-20 | 1 | -1/+1 |
| | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | | Improve shregmap help message, fixes #1113 | Clifford Wolf | 2019-06-20 | 1 | -0/+2 |
| | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | | Fix typo | Clifford Wolf | 2019-06-20 | 1 | -2/+2 |
|/ / | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Fixed the help summary line for a few commands | acw1251 | 2019-06-19 | 3 | -5/+5 |
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* | | Fix bug in #1078, add entry to CHANGELOG | Eddie Hung | 2019-06-19 | 1 | -3/+3 |
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* | | Use input default values in hierarchy pass | Clifford Wolf | 2019-06-19 | 1 | -0/+38 |
|/ | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | Allow muxcover costs to be changed | Eddie Hung | 2019-06-07 | 1 | -12/+42 |
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* | Merge pull request #1071 from YosysHQ/eddie/fix_1070 | Clifford Wolf | 2019-06-06 | 1 | -2/+2 |
|\ | | | | | Fix typo in opt_rmdff causing register to be incorrectly removed | ||||
| * | Fix typo in opt_rmdff | Eddie Hung | 2019-06-05 | 1 | -2/+2 |
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* | | Merge pull request #1072 from YosysHQ/eddie/fix_1069 | Clifford Wolf | 2019-06-06 | 1 | -0/+5 |
|\ \ | | | | | | | Error out if no top module given before 'sim' | ||||
| * | | Error out if no top module given before 'sim' | Eddie Hung | 2019-06-05 | 1 | -0/+5 |
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* / | Missing doc for -tech xilinx in shregmap | Eddie Hung | 2019-06-05 | 1 | -0/+3 |
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* | Merge pull request #1067 from YosysHQ/clifford/fix1065 | Eddie Hung | 2019-06-05 | 1 | -1/+1 |
|\ | | | | | Suppress driver-driver conflict warning for unknown cell types | ||||
| * | Suppress driver-driver conflict warning for unknown cell types, fixes #1065 | Clifford Wolf | 2019-06-05 | 1 | -1/+1 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Major rewrite of wire selection in setundef -init | Clifford Wolf | 2019-06-05 | 1 | -30/+89 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Indent fix | Clifford Wolf | 2019-06-05 | 1 | -23/+25 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Merge pull request #999 from jakobwenzel/setundefInitFix | Clifford Wolf | 2019-06-05 | 1 | -16/+23 |
|\ \ | | | | | | | initialize more registers in setundef -init | ||||
| * | | initialize more registers in setundef -init | Jakob Wenzel | 2019-05-09 | 1 | -16/+23 |
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* | | | Fix typo in fmcombine log message, fixes #1063 | Clifford Wolf | 2019-06-05 | 1 | -2/+2 |
| |/ |/| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Fix "tee" handling of log_streams | Clifford Wolf | 2019-05-31 | 1 | -0/+5 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Merge pull request #1049 from YosysHQ/clifford/fix1047 | Clifford Wolf | 2019-05-28 | 1 | -4/+11 |
|\ \ | | | | | | | Do not use shiftmul peepopt pattern when mul result is truncated | ||||
| * | | Do not use shiftmul peepopt pattern when mul result is truncated, fixes #1047 | Clifford Wolf | 2019-05-28 | 1 | -4/+11 |
| | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | | Refactor hierarchy wand/wor handling | Clifford Wolf | 2019-05-28 | 1 | -102/+143 |
| | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | | Merge branch 'master' into wandwor | Stefan Biereigel | 2019-05-27 | 2 | -6/+71 |
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| * | | Merge pull request #1026 from YosysHQ/clifford/fix1023 | Clifford Wolf | 2019-05-27 | 1 | -2/+3 |
| |\ \ | | | | | | | | | Keep zero-width wires in opt_clean if and only if they are ports | ||||
| | * | | Keep zero-width wires in opt_clean if and only if they are ports, fixes #1023 | Clifford Wolf | 2019-05-22 | 1 | -2/+3 |
| | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
| * | | | Revert enable check | Eddie Hung | 2019-05-25 | 1 | -3/+1 |
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| * | | | opt_rmdff to optimise even in presence of enable signal, even removing | Eddie Hung | 2019-05-24 | 1 | -12/+29 |
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| * | | | Add comments | Eddie Hung | 2019-05-24 | 1 | -1/+22 |
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| * | | | Resolve @cliffordwolf review, set even if !has_init | Eddie Hung | 2019-05-24 | 1 | -2/+1 |
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| * | | | Fix spacing | Eddie Hung | 2019-05-23 | 1 | -2/+2 |
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| * | | | opt_rmdff to work on $dffe and $_DFFE_* | Eddie Hung | 2019-05-23 | 1 | -3/+32 |
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* / / | move wand/wor resolution into hierarchy pass | Stefan Biereigel | 2019-05-27 | 1 | -1/+77 |
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* | | Add "wreduce -keepdc", fixes #1016 | Clifford Wolf | 2019-05-20 | 1 | -1/+9 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Improvements in opt_clean | Clifford Wolf | 2019-05-15 | 1 | -10/+10 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Do not leak file descriptors in cover.cc | Clifford Wolf | 2019-05-15 | 1 | -5/+6 |
| | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | ||||
* | | Fix two instances of integer-assignment to string. | Henner Zeller | 2019-05-14 | 2 | -2/+3 |
| | | | | | | | | | | | | | | | | | | o In cover.cc, the int-result of mkstemps() was assigned to a string and silently interpreted as a single-character filename with a funny value. Fix with the intent: assign the filename. o in libparse.cc, an int was assigned to a string, but depending on visible constructors, this is ambiguous. Explicitly cast this to a char. |