Commit message (Collapse) | Author | Age | Files | Lines | |
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* | techmap: Replace naughty `const_cast<>()`s. | Alberto Gonzalez | 2020-05-14 | 1 | -2/+4 |
| | | | | Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
* | techmap: Replace pseudo-private member usage with the range accessor ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -3/+3 |
| | | | | function and some naughty `const_cast<>()`s. | ||||
* | techmap: sort celltypeMap as it determines techmap order | Eddie Hung | 2020-05-14 | 1 | -1/+5 |
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* | Replace `std::set`s using custom comparators with `pool`. | Alberto Gonzalez | 2020-05-14 | 1 | -4/+4 |
| | | | | Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
* | techmap: prefix special wires with backslash for use as IdString | Eddie Hung | 2020-05-14 | 1 | -11/+12 |
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* | Further clean up `passes/techmap/techmap.cc`. | Alberto Gonzalez | 2020-05-14 | 1 | -5/+6 |
| | | | | Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
* | Use `emplace()` for more efficient insertion into various `dict`s. | Alberto Gonzalez | 2020-05-14 | 1 | -8/+8 |
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* | Build constant bits directly rather than constructing an object and copying ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -2/+5 |
| | | | | its bits. | ||||
* | Replace `std::set` with `pool` for `cell_to_inbit` and `outbit_to_cell`. | Alberto Gonzalez | 2020-05-14 | 1 | -2/+2 |
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* | Use `emplace()` rather than `insert()`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
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* | Clean up pseudo-private member usage and ensure range iteration uses ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -17/+17 |
| | | | | references where possible to avoid unnecessary copies. | ||||
* | Clean up extraneous buffer. | Alberto Gonzalez | 2020-05-14 | 1 | -5/+2 |
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* | Replace `std::map` with `dict` for `unique_bit_id`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
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* | Replace `std::map` with `dict` for `port_new2old_map`, `port_connmap`, and ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -3/+3 |
| | | | | `cellbits_to_tplbits`. | ||||
* | Replace `std::map` with `dict` for `connbits_map`, `cell_to_inbit`, and ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -3/+3 |
| | | | | `outbit_to_cell`. | ||||
* | Replace `std::map` with `dict` for `TechmapWires` type. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
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* | Replace `std::map` with `dict` for `celltypeMap`. | Alberto Gonzalez | 2020-05-14 | 1 | -3/+3 |
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* | Replace `std::set` with `pool` for `handled_cells` and `techmap_wire_names`. | Alberto Gonzalez | 2020-05-14 | 1 | -4/+4 |
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* | Replace `std::map` with `dict` for `positional_ports`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+1 |
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* | Add specialized `hash()` for type `dict` and use a `dict` instead of a ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -4/+4 |
| | | | | `std::map` for `techmap_cache` and `techmap_do_cache`. | ||||
* | Replace `std::map` with `dict` for `simplemap_mappers`. | Alberto Gonzalez | 2020-05-14 | 3 | -5/+5 |
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* | Use `nullptr` instead of `NULL` in `passes/techmap/techmap.cc`. | Alberto Gonzalez | 2020-05-14 | 1 | -10/+10 |
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* | Replace `std::string` and `RTLIL::IdString` with `IdString` in ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -21/+21 |
| | | | | | | `passes/techmap/techmap.cc`. Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
* | Do not modify design modules while iterating over `modules()`. | Alberto Gonzalez | 2020-05-14 | 1 | -1/+4 |
| | | | | Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
* | Clean up pseudo-private member usage, superfluous `std::vector` ↵ | Alberto Gonzalez | 2020-05-14 | 1 | -76/+70 |
| | | | | instantiation, and `RTLIL::id2cstr()` usage in `passes/techmap/techmap.cc`. | ||||
* | Merge pull request #2014 from YosysHQ/claire/fixoptalu | Claire Wolf | 2020-05-03 | 1 | -7/+19 |
|\ | | | | | Fix the other "opt_expr -fine" bug introduced in 213a89558 | ||||
| * | Fix the other "opt_expr -fine" bug introduced in 213a89558 | Claire Wolf | 2020-05-02 | 1 | -7/+19 |
| | | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com> | ||||
* | | abc9_ops: -reintegrate to be sensitive to start_offset too | Eddie Hung | 2020-05-02 | 1 | -3/+5 |
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* | Merge pull request #2010 from YosysHQ/claire/fixopt | Claire Wolf | 2020-05-02 | 1 | -7/+19 |
|\ | | | | | Fix "opt_expr -fine" bug introduced in 213a89558 | ||||
| * | Fix "opt_expr -fine" bug introduced in 213a89558 | Claire Wolf | 2020-05-01 | 1 | -7/+19 |
| | | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com> | ||||
* | | Add WASI platform support. | whitequark | 2020-04-30 | 7 | -9/+31 |
|/ | | | | | | | | | | | | This includes the following significant changes: * Patching ezsat and minisat to disable resource limiting code on WASM/WASI, since the POSIX functions they use are unavailable. * Adding a new definition, YOSYS_DISABLE_SPAWN, present if platform does not support spawning subprocesses (i.e. Emscripten or WASI). This definition hides the definition of `run_command()`. * Adding a new Makefile flag, DISABLE_SPAWN, present in the same condition. This flag disables all passes that require spawning subprocesses for their function. | ||||
* | bugpoint: improve messaging | Eddie Hung | 2020-04-24 | 1 | -7/+7 |
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* | bugpoint: (* keep *) to (* bugpoint_keep *); also apply to modules/cells | Eddie Hung | 2020-04-24 | 1 | -5/+14 |
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* | bugpoint: skip ports with (* keep *) on; add header | Eddie Hung | 2020-04-24 | 1 | -9/+18 |
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* | bugpoint: improve help text | Eddie Hung | 2020-04-23 | 1 | -11/+13 |
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* | Merge pull request #1974 from YosysHQ/eddie/abc9_disable_mfs | Eddie Hung | 2020-04-23 | 1 | -2/+17 |
|\ | | | | | abc9: tolerate &mfs failure by writing output file before calling it (and using that if it fails) | ||||
| * | abc9: tolerate ABC nonzero exit code if output.aig; write before &mfs | Eddie Hung | 2020-04-20 | 1 | -2/+13 |
| | | | | | | | | | | Re-enable mfs for xilinx/ecp5 speculatively -- if it fails, use pre-mfs result | ||||
| * | xilinx/ecp5: disable abc9's "&mfs" optimisation | Eddie Hung | 2020-04-20 | 1 | -0/+4 |
| | | | | | | | | Can sometimes fire an assertion, e.g. #1962 | ||||
* | | Merge pull request #1989 from boqwxp/qbfsat_anyconst_sourcelocs | Claire Wolf | 2020-04-23 | 1 | -5/+2 |
|\ \ | | | | | | | qbfsat: Make hole name recovery from source locations more robust. | ||||
| * | | qbfsat: Make hole name recovery more robust. Allow multiple cell types to ↵ | Alberto Gonzalez | 2020-04-23 | 1 | -5/+2 |
| | | | | | | | | | | | | share the same source location as long as only one `$anyconst` or `$anyseq` has that location. | ||||
* | | | Merge pull request #1988 from boqwxp/qbfsat | Claire Wolf | 2020-04-23 | 1 | -6/+22 |
|\ \ \ | | | | | | | | | qbfsat: Add `-assume-negative-polarity` option. | ||||
| * | | | qbfsat: Add `-assume-negative-polarity` option. | Alberto Gonzalez | 2020-04-23 | 1 | -6/+22 |
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* / / | xilinx: xilinx_dsp_cascade to check CREG for DSP48E1 only | Eddie Hung | 2020-04-22 | 1 | -1/+1 |
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* | | Merge pull request #1949 from YosysHQ/eddie/select_blackbox | Eddie Hung | 2020-04-22 | 1 | -9/+26 |
|\ \ | | | | | | | select: do not select inside black-/white- boxes unless '=' prefix used | ||||
| * | | Update passes/cmds/select.cc | Claire Wolf | 2020-04-22 | 1 | -2/+2 |
| | | | | | | | | | Co-Authored-By: Eddie Hung <eddie@fpgeh.com> | ||||
| * | | select: do not select black/white boxes by default, '=' prefix to do so | Eddie Hung | 2020-04-22 | 1 | -5/+5 |
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| * | | Add '=' selection pattern prefix for non-blackbox only patterns | Claire Wolf | 2020-04-21 | 1 | -12/+26 |
| | | | | | | | | | | | | Signed-off-by: Claire Wolf <claire@symbioticeda.com> | ||||
| * | | select: do not select inside blackboxes | Eddie Hung | 2020-04-16 | 1 | -0/+3 |
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* | | | Cleanup use of hard-coded default parameters in light of #1945 | Eddie Hung | 2020-04-22 | 7 | -48/+48 |
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* | | | Merge pull request #1950 from YosysHQ/eddie/design_import | Eddie Hung | 2020-04-22 | 1 | -2/+8 |
|\ \ \ | | | | | | | | | design: -import to not count black/white-boxes as candidates for top |