| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | | | | | Remove extra semicolon | Eddie Hung | 2019-06-14 | 1 | -1/+1 | |
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| * | | | | Rip out all non FPGA stuff from abc9 | Eddie Hung | 2019-06-12 | 1 | -343/+111 | |
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| * | | | | Fix spelling | Eddie Hung | 2019-06-12 | 1 | -1/+1 | |
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| * | | | | Revert "For 'stat' do not count modules with abc_box_id" | Eddie Hung | 2019-06-12 | 1 | -3/+0 | |
| | | | | | | | | | | | | | | | | | This reverts commit b89bb744529fc8a5e4cd38522f86a797117f2abc. | |||||
| * | | | | Be more precise when connecting during ABC9 re-integration | Eddie Hung | 2019-06-12 | 1 | -1/+3 | |
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| * | | | | Remove hacky wideports_split from abc9 | Eddie Hung | 2019-06-12 | 1 | -52/+4 | |
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| * | | | | Fix compile errors when #if 1 for debug | Eddie Hung | 2019-06-12 | 1 | -7/+8 | |
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| * | | | | Do not call abc9 if no outputs | Eddie Hung | 2019-06-12 | 1 | -54/+65 | |
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| * | | | | More write_xaiger cleanup | Eddie Hung | 2019-06-12 | 1 | -1/+1 | |
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| * | | | | Consistency | Eddie Hung | 2019-06-12 | 1 | -1/+1 | |
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| * | | | | Merge branch 'xc7mux' into xaig | Eddie Hung | 2019-06-12 | 1 | -1/+1 | |
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| | * | | | | Typo: wire delay is -W argument | Eddie Hung | 2019-06-12 | 1 | -1/+1 | |
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| * | | | | | Revert "Merge remote-tracking branch 'origin/eddie/shregmap_improve' into ↵ | Eddie Hung | 2019-06-12 | 1 | -6/+3 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xc7mux" This reverts commit a138381ac3f2c820d187f08531ffd823d6cbcfd5, reversing changes made to b77c5da76919f7f99f171a0a2775896fbc8debc2. | |||||
| * | | | | | Revert "Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux" | Eddie Hung | 2019-06-12 | 2 | -267/+0 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit eaee250a6e63e58dfef63fa30c4120db78223e24, reversing changes made to 935df3569b4677ac38041ff01a2f67185681f4e3. | |||||
| * | | | | | Revert "Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux" | Eddie Hung | 2019-06-12 | 1 | -14/+10 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 2223ca91b0cc559bb876e8e97372a8f77da1603e, reversing changes made to eaee250a6e63e58dfef63fa30c4120db78223e24. | |||||
| * | | | | | Retry "Add "-W' wire delay arg to abc9, use from synth_xilinx" | Eddie Hung | 2019-06-12 | 1 | -5/+13 | |
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| * | | | | | Revert "Add "-W' wire delay arg to abc9, use from synth_xilinx" | Eddie Hung | 2019-06-12 | 1 | -13/+5 | |
| |/ / / / | | | | | | | | | | | | | This reverts commit 2dffa4685b830313204f5d04314a14ed6ecac8ec. | |||||
| * | | | | Add "-W' wire delay arg to abc9, use from synth_xilinx | Eddie Hung | 2019-06-11 | 1 | -5/+13 | |
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| * | | | | Revert "Merge remote-tracking branch 'origin/eddie/shregmap_improve' into ↵ | Eddie Hung | 2019-06-11 | 1 | -15/+10 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xc7mux" This reverts commit 5174082208ef9bea22ad1ba62622947375b3e83b, reversing changes made to 54379f9872ba3abdf5328994abcf5abfc7288c6b. | |||||
| * | | | | Merge remote-tracking branch 'origin/eddie/shregmap_improve' into xc7mux | Eddie Hung | 2019-06-11 | 1 | -10/+15 | |
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| | * | | | Try way that doesn't involve creating a new wire | Eddie Hung | 2019-06-11 | 1 | -10/+15 | |
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| * | | | | Merge remote-tracking branch 'origin/eddie/shregmap_improve' into xc7mux | Eddie Hung | 2019-06-10 | 1 | -3/+6 | |
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| | * | | | If d_bit already in sigbit_chain_next, create extra wire | Eddie Hung | 2019-06-10 | 1 | -3/+6 | |
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| | * | | Allow muxcover costs to be changed | Eddie Hung | 2019-06-07 | 1 | -12/+42 | |
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| * | | | Revert "Rename shregmap -tech xilinx -> xilinx_dynamic" | Eddie Hung | 2019-06-10 | 1 | -4/+4 | |
| | | | | | | | | | | | | | This reverts commit 94a5f4e60985fc1e3fea75eec85638fa29874bea. | |||||
| * | | | Revert "shregmap -tech xilinx_dynamic to work -params and -enpol" | Eddie Hung | 2019-06-10 | 1 | -26/+6 | |
| | | | | | | | | | | | | | This reverts commit 45d1bdf83ae6d51628e917b66f1b6043c8a3baee. | |||||
| * | | | Revert "Refactor to ShregmapTechXilinx7Static" | Eddie Hung | 2019-06-10 | 1 | -86/+46 | |
| | | | | | | | | | | | | | This reverts commit e1e37db86073e545269ff440da77f57135e8b155. | |||||
| * | | | Revert "Add -tech xilinx_static" | Eddie Hung | 2019-06-10 | 1 | -13/+2 | |
| | | | | | | | | | | | | | This reverts commit dfe9d95579ab98d7518d40e427af858243de4eb3. | |||||
| * | | | Revert "Continue support for ShregmapTechXilinx7Static" | Eddie Hung | 2019-06-10 | 1 | -81/+30 | |
| | | | | | | | | | | | | | This reverts commit 72eda94a66c8c4938a713c9ae49d560e6b33574f. | |||||
| * | | | Revert "shregmap -tech xilinx_static to handle INIT" | Eddie Hung | 2019-06-10 | 1 | -32/+22 | |
| | | | | | | | | | | | | | This reverts commit 935df3569b4677ac38041ff01a2f67185681f4e3. | |||||
| * | | | Fine tune aigerparse | Eddie Hung | 2019-06-07 | 1 | -1/+5 | |
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| * | | | Allow muxcover costs to be changed | Eddie Hung | 2019-06-07 | 1 | -12/+42 | |
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| * | | | Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux | Eddie Hung | 2019-06-06 | 1 | -10/+14 | |
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| | * | | Fix and test for balanced case | Eddie Hung | 2019-06-06 | 1 | -10/+14 | |
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| * | | | Merge remote-tracking branch 'origin/eddie/muxpack' into xc7mux | Eddie Hung | 2019-06-06 | 5 | -2/+277 | |
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| | * | | Support cascading $pmux.A with $mux.A and $mux.B | Eddie Hung | 2019-06-06 | 1 | -17/+25 | |
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| | * | | More cleanup | Eddie Hung | 2019-06-06 | 1 | -15/+20 | |
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| | * | | Fix spacing | Eddie Hung | 2019-06-06 | 1 | -6/+5 | |
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| | * | | Non chain user check using next_sig | Eddie Hung | 2019-06-06 | 1 | -7/+5 | |
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| | * | | Move muxpack from passes/techmap to passes/opt | Eddie Hung | 2019-06-06 | 3 | -1/+1 | |
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| | * | | Update doc | Eddie Hung | 2019-06-06 | 1 | -4/+5 | |
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| | * | | Add tests, fix for != | Eddie Hung | 2019-06-06 | 1 | -9/+32 | |
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| | * | | Missing file | Eddie Hung | 2019-06-06 | 1 | -0/+232 | |
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| | * | | Initial adaptation of muxpack from shregmap | Eddie Hung | 2019-06-06 | 1 | -0/+1 | |
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| | * | Merge pull request #1071 from YosysHQ/eddie/fix_1070 | Clifford Wolf | 2019-06-06 | 1 | -2/+2 | |
| | |\ | | | | | | | Fix typo in opt_rmdff causing register to be incorrectly removed | |||||
| | | * | Fix typo in opt_rmdff | Eddie Hung | 2019-06-05 | 1 | -2/+2 | |
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| | * | | Merge pull request #1072 from YosysHQ/eddie/fix_1069 | Clifford Wolf | 2019-06-06 | 1 | -0/+5 | |
| | |\ \ | | | | | | | | | Error out if no top module given before 'sim' | |||||
| | | * | | Error out if no top module given before 'sim' | Eddie Hung | 2019-06-05 | 1 | -0/+5 | |
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| | * / | Missing doc for -tech xilinx in shregmap | Eddie Hung | 2019-06-05 | 1 | -0/+3 | |
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| | * | Merge pull request #1067 from YosysHQ/clifford/fix1065 | Eddie Hung | 2019-06-05 | 1 | -1/+1 | |
| | |\ | | | | | | | Suppress driver-driver conflict warning for unknown cell types | |||||
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index : iCE40/yosys | |
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