aboutsummaryrefslogtreecommitdiffstats
path: root/passes/techmap
Commit message (Collapse)AuthorAgeFilesLines
...
| * Use `emplace()` rather than `insert()`.Alberto Gonzalez2020-05-141-1/+1
| |
| * Clean up pseudo-private member usage and ensure range iteration uses ↵Alberto Gonzalez2020-05-141-17/+17
| | | | | | | | references where possible to avoid unnecessary copies.
| * Clean up extraneous buffer.Alberto Gonzalez2020-05-141-5/+2
| |
| * Replace `std::map` with `dict` for `unique_bit_id`.Alberto Gonzalez2020-05-141-1/+1
| |
| * Replace `std::map` with `dict` for `port_new2old_map`, `port_connmap`, and ↵Alberto Gonzalez2020-05-141-3/+3
| | | | | | | | `cellbits_to_tplbits`.
| * Replace `std::map` with `dict` for `connbits_map`, `cell_to_inbit`, and ↵Alberto Gonzalez2020-05-141-3/+3
| | | | | | | | `outbit_to_cell`.
| * Replace `std::map` with `dict` for `TechmapWires` type.Alberto Gonzalez2020-05-141-1/+1
| |
| * Replace `std::map` with `dict` for `celltypeMap`.Alberto Gonzalez2020-05-141-3/+3
| |
| * Replace `std::set` with `pool` for `handled_cells` and `techmap_wire_names`.Alberto Gonzalez2020-05-141-4/+4
| |
| * Replace `std::map` with `dict` for `positional_ports`.Alberto Gonzalez2020-05-141-1/+1
| |
| * Add specialized `hash()` for type `dict` and use a `dict` instead of a ↵Alberto Gonzalez2020-05-141-4/+4
| | | | | | | | `std::map` for `techmap_cache` and `techmap_do_cache`.
| * Replace `std::map` with `dict` for `simplemap_mappers`.Alberto Gonzalez2020-05-143-5/+5
| |
| * Use `nullptr` instead of `NULL` in `passes/techmap/techmap.cc`.Alberto Gonzalez2020-05-141-10/+10
| |
| * Replace `std::string` and `RTLIL::IdString` with `IdString` in ↵Alberto Gonzalez2020-05-141-21/+21
| | | | | | | | | | | | `passes/techmap/techmap.cc`. Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
| * Do not modify design modules while iterating over `modules()`.Alberto Gonzalez2020-05-141-1/+4
| | | | | | | | Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
| * Clean up pseudo-private member usage, superfluous `std::vector` ↵Alberto Gonzalez2020-05-141-76/+70
| | | | | | | | instantiation, and `RTLIL::id2cstr()` usage in `passes/techmap/techmap.cc`.
* | abc9_ops: update commentEddie Hung2020-05-211-1/+1
| |
* | abc9: use (* abc9_keep *) instead of (* abc9_scc *); apply to $_DFF_?_Eddie Hung2020-05-141-3/+3
| | | | | | | | instead of moving them to $__ prefix
* | abc9_ops: -prep_hier to create unmap module that removes Q's (* init *)Eddie Hung2020-05-141-4/+6
| |
* | abc9: preserve $_DFF_?_.Q's (* init *); rely on clean to remove itEddie Hung2020-05-141-17/+1
| |
* | Fix broken test when ignoring abc9_flop with init == 1'b1Eddie Hung2020-05-141-3/+0
| |
* | abc9_ops/xaiger: further reducing Module::derive() calls by ...Eddie Hung2020-05-141-88/+84
| | | | | | | | replacing _all_ (* abc9_box *) instantiations with their derived types
* | Cleanup; reduce Module::derive() callsEddie Hung2020-05-141-131/+140
| |
* | abc9: update to =_$abc9_flops pattern which includes whiteboxesEddie Hung2020-05-141-3/+3
| |
* | abc9_ops: update docsEddie Hung2020-05-141-11/+10
| |
* | abc9: only do +/abc9_map if `DFFEddie Hung2020-05-141-1/+4
| |
* | abc9: rework submod -- since it won't move (* keep *) cellsEddie Hung2020-05-142-34/+29
| |
* | abc9_ops: move assertEddie Hung2020-05-141-1/+1
| |
* | abc9: put 'aigmap' backEddie Hung2020-05-141-0/+1
| |
* | abc9_ops: fix bypass boxes using (* abc9_bypass *)Eddie Hung2020-05-141-12/+9
| |
* | abc9_ops: tidy up, suppress error if no boxes/holesEddie Hung2020-05-141-18/+18
| |
* | abc9_ops: -prep_delays to not insert delay box if input connection is constEddie Hung2020-05-141-0/+2
| |
* | abc9_ops: cleanup; -prep_dff -> -prep_dff_submodEddie Hung2020-05-142-22/+14
| |
* | abc9_ops: add -prep_bypass for auto bypass boxes; refactorEddie Hung2020-05-142-173/+509
| | | | | | | | | | Eliminate need for abc9_{,un}map.v in xilinx -prep_dff_{hier,unmap} -> -prep_hier
* | abc9_ops: -reintegrate to handle $_FF_; cleanupEddie Hung2020-05-141-22/+18
| |
* | abc9: restore selected_modules()Eddie Hung2020-05-141-1/+1
| |
* | abc9: add flop boxes to basic $_DFF_P_ and $_DFF_N_ tooEddie Hung2020-05-142-19/+26
| |
* | abc9_ops: -prep_dff_map to error if async flop foundEddie Hung2020-05-141-5/+7
| |
* | abc9: remove redundant wbflipEddie Hung2020-05-141-1/+0
| |
* | abc9: generate $abc9_holes design instead of <name>$holesEddie Hung2020-05-142-15/+19
| |
* | abc9_ops: more robustEddie Hung2020-05-141-8/+14
| |
* | abc9: suppress warnings when no compatible + used flop boxes formedEddie Hung2020-05-142-37/+63
| |
* | abc9: cleanupEddie Hung2020-05-141-7/+11
| |
* | abc9_ops: -prep_dff_map to check $_DFF_[NP]_.Q drives module outputEddie Hung2020-05-141-1/+5
| |
* | abc9_ops: do away with '$abc9_cells' selectionEddie Hung2020-05-142-40/+30
| |
* | abc9_ops: use new 'design -delete' and 'select -unset'Eddie Hung2020-05-142-16/+7
| |
* | abc9_ops: -prep_dff_map to warn if no specify cellsEddie Hung2020-05-141-7/+12
| |
* | abc9_ops: -prep_dff_map to cope with plain $_DFF_[NP]_ flopsEddie Hung2020-05-141-12/+39
| |
* | abc9: cleanupEddie Hung2020-05-141-4/+1
| |
* | abc9_ops: do not use (* abc9_init *)Eddie Hung2020-05-141-16/+31
| |
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-08 16:42:44 +0000