| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | Merge pull request #2403 from nakengelhardt/sim_timescale | N. Engelhardt | 2020-10-22 | 1 | -0/+21 | |
| |\ | | | | | sim -vcd: add date, version, and option for timescale | |||||
| | * | use strftime instead of put_time for gcc 4.8 compatibility | N. Engelhardt | 2020-10-21 | 1 | -4/+5 | |
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| | * | wild guessing at the problem because it builds fine on my machines | N. Engelhardt | 2020-10-16 | 1 | -0/+3 | |
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| | * | sim -vcd: add date, version, and option for timescale | N. Engelhardt | 2020-10-16 | 1 | -0/+17 | |
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| * | | sim: Use Mem helper. | Marcelina Kościelnicka | 2020-10-21 | 1 | -103/+90 | |
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| * | sim - error when memrd and memwr detected | Miodrag Milanovic | 2020-06-29 | 1 | -1/+4 | |
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| * | Use C++11 final/override keywords. | whitequark | 2020-06-18 | 1 | -2/+2 | |
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| * | sim: Fix handling of constant-connected cell inputs at startup | David Shah | 2020-04-21 | 1 | -1/+5 | |
| | | | | | Signed-off-by: David Shah <dave@ds0.me> | |||||
| * | kernel: big fat patch to use more ID::*, otherwise ID(*) | Eddie Hung | 2020-04-02 | 1 | -57/+57 | |
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| * | kernel: use more ID::* | Eddie Hung | 2020-04-02 | 1 | -11/+11 | |
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| * | Fix sim for assignments with lhs<rhs size, fixes #1565 | Clifford Wolf | 2019-12-17 | 1 | -1/+1 | |
| | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at> | |||||
| * | Error out if no top module given before 'sim' | Eddie Hung | 2019-06-05 | 1 | -0/+5 | |
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| * | Fixed minor typo in "sim" help message | acw1251 | 2018-09-12 | 1 | -1/+1 | |
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| * | Consistent use of 'override' for virtual methods in derived classes. | Henner Zeller | 2018-07-20 | 1 | -2/+2 | |
| | | | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established) | |||||
| * | Rename "singleton" pass to "uniquify" | Clifford Wolf | 2017-08-20 | 1 | -1/+1 | |
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| * | Add "sim -zinit -rstlen" | Clifford Wolf | 2017-08-18 | 1 | -1/+53 | |
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| * | Add "sim" support for memories | Clifford Wolf | 2017-08-18 | 1 | -2/+136 | |
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| * | Add support for assert/assume/cover to "sim" command | Clifford Wolf | 2017-08-18 | 1 | -4/+47 | |
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| * | Add writeback mode to "sim" command | Clifford Wolf | 2017-08-17 | 1 | -0/+44 | |
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| * | Improve "sim" command | Clifford Wolf | 2017-08-17 | 1 | -54/+272 | |
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| * | Add "sim" command skeleton | Clifford Wolf | 2017-08-16 | 1 | -0/+371 | |
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index : iCE40/yosys | |
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