iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Using log_assert() instead of assert()	Clifford Wolf	2014-07-28	1	-1/+1
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*	Refactoring: Renamed RTLIL::Design::modules to modules_	Clifford Wolf	2014-07-27	1	-2/+2
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*	Refactoring: Renamed RTLIL::Module::cells to cells_	Clifford Wolf	2014-07-27	1	-3/+3
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*	Refactoring: Renamed RTLIL::Module::wires to wires_	Clifford Wolf	2014-07-27	1	-1/+1
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*	Manual fixes for new cell connections API	Clifford Wolf	2014-07-26	1	-3/+3
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*	Changed users of cell->connections_ to the new API (sed command)	Clifford Wolf	2014-07-26	1	-5/+5
\| \| \| \| \| \| \| \| \|	git grep -l 'connections_' \| xargs sed -i -r -e ' s/(->\|\.)connections_\["([^"])"\] = (.);/\1set("\2", \3);/g; s/(->\|\.)connections_\["([^"])"\]/\1get("\2")/g; s/(->\|\.)connections_.at\("([^"])"\)/\1get("\2")/g; s/(->\|\.)connections_.push_back/\1connect/g; s/(->\|\.)connections_/\1connections()/g;'
*	Renamed RTLIL::{Module,Cell}::connections to connections_	Clifford Wolf	2014-07-26	1	-5/+5
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*	Various RTLIL::SigSpec related code cleanups	Clifford Wolf	2014-07-25	1	-3/+3
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*	Replaced more old SigChunk programming patterns	Clifford Wolf	2014-07-24	1	-2/+2
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*	Removed RTLIL::SigSpec::optimize()	Clifford Wolf	2014-07-23	1	-3/+0
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*	SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, ↵	Clifford Wolf	2014-07-22	1	-2/+2
\| \| \| \|	created interim RTLIL::SigSpec::chunks_rw()
*	SigSpec refactoring: using the accessor functions everywhere	Clifford Wolf	2014-07-22	1	-17/+17
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*	SigSpec refactoring: renamed chunks and width to __chunks and __width	Clifford Wolf	2014-07-22	1	-17/+17
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*	Improved seeding of color rng in show command	Clifford Wolf	2014-07-18	1	-1/+3
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*	fixed syntax error in dot file created by "show" command	Clifford Wolf	2014-05-10	1	-1/+1
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*	- kernel/register.h, kernel/driver.cc: refactor ↵	Siesh1oo	2014-03-12	1	-1/+2
\| \| \| \| \| \| \|	rewrite_yosys_exe()/get_share_file_name() to portable proc_self_dirname()/proc_share_dirname(). This refactoring improves robustness and allows OSX support with only 7 new lines of code, and easy extension for other systems. - passes/abc/abc.cc, passes/cmds/show.cc, passes/techmap/techmap.cc: use new, refactored semantics.
*	Added show -notitle option	Clifford Wolf	2014-02-02	1	-4/+14
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*	Added show -color support for cells and finished show -label implementation	Clifford Wolf	2014-02-01	1	-13/+36
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*	Replaced RTLIL::Const::str with generic decoder method	Clifford Wolf	2013-12-04	1	-1/+1
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*	Fixes and improvements in "show" command	Clifford Wolf	2013-11-28	1	-10/+42
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*	Added "src" attribute to processes	Clifford Wolf	2013-11-28	1	-1/+4
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*	Added support for "show -pause" and "show -format dot"	Clifford Wolf	2013-11-28	1	-6/+30
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*	Renamed "placeholder" to "blackbox"	Clifford Wolf	2013-11-22	1	-3/+3
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*	Added placeholder check to dfflibmap and cleaned up some other placeholder ↵	Clifford Wolf	2013-10-31	1	-2/+2
\| \| \| \|	checks
*	Fixed handling of boolean attributes (passes)	Clifford Wolf	2013-10-24	1	-2/+2
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*	Some minor documentation fixes	Clifford Wolf	2013-08-21	1	-1/+1
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*	Renamed yosys-show temp files to be dot-files in the users home directory	Clifford Wolf	2013-06-12	1	-3/+3
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*	Look for yosys-abc and yosys-svgviewer where the main exe is	Clifford Wolf	2013-06-09	1	-1/+1
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*	Moved cmds from kernel/ to passes/cmds/	Clifford Wolf	2013-06-08	1	-0/+684