| Commit message (Expand) | Author | Age | Files | Lines | |||||
|---|---|---|---|---|---|---|---|---|---|
| * | Support SystemVerilog `` extension for macros | Jim Paris | 2018-05-17 | 1 | -1/+5 | ||||
| * | Skip spaces around macro arguments | Jim Paris | 2018-05-17 | 1 | -0/+-- LLVM binding
-- Copyright (C) 2014 Tristan Gingold
--
-- GHDL is free software; you can redistribute it and/or modify it under
-- the terms of the GNU General Public License as published by the Free
-- Software Foundation; either version 2, or (at your option) any later
-- version.
--
-- GHDL is distributed in the hope that it will be useful, but WITHOUT ANY
-- WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with GHDL; see the file COPYING. If not, write to the Free
-- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-- 02111-1307, USA.
package LLVM is
pragma Pure (LLVM);
end LLVM;
| Clifford Wolf | 2014-08-14 | 1 | -4/+9 |
| * | Added support for non-standard """ macro bodies | Clifford Wolf | 2014-08-13 | 1 | -1/+12 | ||||
| * | Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace | Clifford Wolf | 2014-07-31 | 1 | -0/+4 | ||||
| * | Fixed counting verilog line numbers for "// synopsys translate_off" sections | Clifford Wolf | 2014-07-30 | 1 | -1/+1 | ||||
| * | Fixed Verilog pre-processor for files with no trailing newline | Clifford Wolf | 2014-07-29 | 1 | -1/+1 | ||||
| * | Using log_assert() instead of assert() | Clifford Wolf | 2014-07-28 | 1 | -2/+1 | ||||
| * | Added Verilog support for "`default_nettype none" | Clifford Wolf | 2014-02-17 | 1 | -1/+0 | ||||
| * | Fixed parsing of verilog macros at end of line | Clifford Wolf | 2014-01-18 | 1 | -1/+1 | ||||
| * | Fixed parsing of non-arg macro calls followed by "(" | Clifford Wolf | 2013-12-27 | 1 | -1/+7 | ||||
| * | Fixed parsing of macros with no arguments and expansion text starting with "(" | Clifford Wolf | 2013-12-27 | 1 | -1/+2 | ||||
| * | Added elsif preproc support | Clifford Wolf | 2013-12-18 | 1 | -1/+14 | ||||
| * | Added support for macro arguments | Clifford Wolf | 2013-12-18 | 1 | -23/+75 | ||||
| * | Fixed O(n^2) performance bug in verilog preprocessor | Clifford Wolf | 2013-11-22 | 1 | -1/+1 | ||||
| * | Enable {* .. *} feature per default (removes dependency to REJECT feature in ... | Clifford Wolf | 2013-11-22 | 1 | -11/+0 | ||||
| * | Added support for include directories with the new '-I' argument of the | Johann Glaser | 2013-08-20 | 1 | -2/+12 | ||||
| * | added option '-Dname[=definition]' to command 'read_verilog' | Johann Glaser | 2013-05-19 | 1 | -2/+2 | ||||
| * | initial import | Clifford Wolf | 2013-01-05 | 1 | -0/+360 |
 |
index : iCE40/yosys | |
| clone of https://github.com/YosysHQ/yosys |
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