iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Fixed handling of [a-fxz?] in decimal constants	Clifford Wolf	2015-08-11	1	-2/+7
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*	Fixed trailing whitespaces	Clifford Wolf	2015-07-02	1	-2/+2
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*	Fixed two minor bugs in constant parsing	Clifford Wolf	2014-11-24	1	-1/+5
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*	Added warning for use of 'z' constants in HDL	Clifford Wolf	2014-11-14	1	-1/+9
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*	Moved some stuff to kernel/yosys.{h,cc}, using Yosys:: namespace	Clifford Wolf	2014-07-31	1	-0/+4
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*	Using log_assert() instead of assert()	Clifford Wolf	2014-07-28	1	-2/+1
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*	Improved parsing of large integer constants	Clifford Wolf	2014-06-15	1	-11/+28
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*	Fixed handling of unsized constants in verilog frontend	Clifford Wolf	2014-01-24	1	-2/+2
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*	Major redesign of expr width/sign detecion (verilog/ast frontend)	Clifford Wolf	2013-07-09	1	-1/+1
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*	Added SAT generator and simple sat_solve command	Clifford Wolf	2013-06-07	1	-3/+2
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*	initial import	Clifford Wolf	2013-01-05	1	-0/+197