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*
Added avail params to ilang format, check module params in 'hierarchy -check'
Clifford Wolf
2016-10-22
1
-2
/
+7
|
*
Added $anyseq cell type
Clifford Wolf
2016-10-14
2
-4
/
+4
|
*
Added $global_clock verilog syntax support for creating $ff cells
Clifford Wolf
2016-10-14
1
-4
/
+11
|
*
Added $past, $stable, $rose, $fell SVA functions
Clifford Wolf
2016-09-19
2
-2
/
+141
|
*
Added assertpmux
Clifford Wolf
2016-09-07
1
-0
/
+1
|
*
Avoid creation of bogus initial blocks for assert/assume in always @*
Clifford Wolf
2016-09-06
3
-1
/
+13
|
*
Added $anyconst support to yosys-smtbmc
Clifford Wolf
2016-08-30
1
-0
/
+2
|
*
Removed $aconst cell type
Clifford Wolf
2016-08-30
2
-5
/
+5
|
*
Removed $predict again
Clifford Wolf
2016-08-28
4
-6
/
+2
|
*
Fixed bug with memories that do not have a down-to-zero data width
Clifford Wolf
2016-08-22
1
-2
/
+13
|
*
Another bugfix in mem2reg code
Clifford Wolf
2016-08-21
3
-7
/
+31
|
*
Minor improvements to AstNode::dumpAst() and AstNode::dumpVlog()
Clifford Wolf
2016-08-21
1
-4
/
+15
|
*
Fixed finish_addr handling in $readmemh/$readmemb
Clifford Wolf
2016-08-20
1
-3
/
+3
|
*
Optimize memory address port width in wreduce and memory_collect, not ↵
Clifford Wolf
2016-08-19
2
-4
/
+13
|
|
|
|
verilog front-end
*
Only allow posedge/negedge with 1 bit wide signals
Clifford Wolf
2016-08-10
1
-0
/
+2
|
*
Added $anyconst and $aconst
Clifford Wolf
2016-07-27
2
-0
/
+49
|
*
Added "read_verilog -dump_rtlil"
Clifford Wolf
2016-07-27
2
-8
/
+21
|
*
Using $initstate in "initial assume" and "initial assert"
Clifford Wolf
2016-07-21
1
-1
/
+6
|
*
Added $initstate cell type and vlog function
Clifford Wolf
2016-07-21
1
-0
/
+24
|
*
After reading the SV spec, using non-standard predict() instead of expect()
Clifford Wolf
2016-07-21
4
-6
/
+6
|
*
Added basic support for $expect cells
Clifford Wolf
2016-07-13
4
-7
/
+16
|
*
Fixed mem assignment in left-hand-side concatenation
Clifford Wolf
2016-07-08
1
-0
/
+44
|
*
A few modifications after pull request comments
Ruben Undheim
2016-06-18
1
-2
/
+2
|
|
|
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|
- Renamed Design::packages to Design::verilog_packages - No need to include ast.h in rtlil.h
*
Added support for SystemVerilog packages with localparam definitions
Ruben Undheim
2016-06-18
3
-1
/
+16
|
*
Fixed procedural assignments to non-unique lvalues, e.g. {y,y} = {a,b}
Clifford Wolf
2016-05-27
1
-0
/
+11
|
*
Fixed access-after-delete bug in mem2reg code
Clifford Wolf
2016-05-27
2
-6
/
+23
|
*
fixed typos in error messages
Clifford Wolf
2016-05-27
1
-3
/
+3
|
*
Include <cmath> in yosys.h
Clifford Wolf
2016-05-08
1
-9
/
+0
|
*
Added "yosys -D" feature
Clifford Wolf
2016-04-21
1
-1
/
+1
|
*
Fixed handling of parameters and const functions in casex/casez pattern
Clifford Wolf
2016-04-21
4
-6
/
+31
|
*
Do not set "nosync" on task outputs, fixes #134
Clifford Wolf
2016-03-24
1
-1
/
+2
|
*
Added support for $stop system task
Clifford Wolf
2016-03-21
1
-5
/
+5
|
*
Added $display %m support, fixed mem leak in $display, fixes #128
Clifford Wolf
2016-03-19
1
-20
/
+44
|
*
Fixed localparam signdness, fixes #127
Clifford Wolf
2016-03-18
1
-1
/
+1
|
*
Set "nosync" attribute on internal task/function wires
Clifford Wolf
2016-03-18
1
-0
/
+1
|
*
Fixed some visual studio warnings
Clifford Wolf
2016-02-13
3
-4
/
+4
|
*
genrtlil: avoid converting SigSpec to set<SigBit> when going through ↵
Rick Altherr
2016-01-31
1
-3
/
+3
|
|
|
|
removeSignalFromCaseTree()
*
Fixed handling of re-declarations of wires in tasks and functions
Clifford Wolf
2015-11-23
1
-7
/
+26
|
*
More bugfixes in handling of parameters in tasks and functions
Clifford Wolf
2015-11-12
1
-1
/
+11
|
*
Fixed handling of parameters and localparams in functions
Clifford Wolf
2015-11-11
2
-3
/
+8
|
*
Import more std:: stuff into Yosys namespace
Clifford Wolf
2015-10-25
2
-32
/
+32
|
*
Fixed complexity of assigning to vectors in constant functions
Clifford Wolf
2015-10-01
1
-0
/
+3
|
*
Fixed detection of unconditional $readmem[hb]
Clifford Wolf
2015-09-30
1
-4
/
+11
|
*
Bugfixes in $readmem[hb]
Clifford Wolf
2015-09-25
1
-4
/
+7
|
*
Fixed segfault in AstNode::asReal
Clifford Wolf
2015-09-25
1
-1
/
+1
|
*
Added read-enable to memory model
Clifford Wolf
2015-09-25
1
-0
/
+1
|
*
Fixed AstNode::mkconst_bits() segfault on zero-sized constant
Clifford Wolf
2015-09-24
1
-1
/
+1
|
*
Bugfix in handling of multi-dimensional memories
Clifford Wolf
2015-09-23
1
-2
/
+2
|
*
Warning for $display/$write outside initial block
Clifford Wolf
2015-09-23
1
-7
/
+8
|
*
Fixed multi-level prefix resolving
Clifford Wolf
2015-09-22
1
-0
/
+2
|
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