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* | Disabled broken $mem support in verilog backendClifford Wolf2015-05-101-11/+11
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* Made changes recommended by Clifford Wolf ...luke whittlesey2015-05-101-22/+11
| | | | | | Removed bit_check_equal(), used RTLIL::SigBit for individual bits, used dict<> instead of std::map, and used RTLIL::SigSpec instead of std::vector.
* Verilog backend for $mem cells should now be able to handle differentluke whittlesey2015-05-081-50/+105
| | | | write-enable bits and RD_TRANSPARENT parameter settings.
* Added support for $mem cells in the verilog backend.luke whittlesey2015-05-071-1/+120
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* Minor fixes in handling of "init" attributeClifford Wolf2015-04-091-7/+7
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* Added "init" attribute support to verilog backendClifford Wolf2015-04-041-0/+5
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* Added Verilog backend $dffsr supportClifford Wolf2015-03-181-1/+51
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* Fixed "write_verilog -attr2comment" handling of "*/" in stringsClifford Wolf2015-02-131-2/+4
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* Added dict/pool.sort()Clifford Wolf2015-01-241-0/+2
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* Cosmetic changes in verilog output formatClifford Wolf2015-01-021-5/+10pre { line-height: 125%; margin: 0; } td.linenos pre { color: #000000; background-color: #f0f0f0; padding: 0 5px 0 5px; } span.linenos { color: #000000; background-color: #f0f0f0; padding: 0 5px 0 5px; } td.linenos pre.special { color: #000000; background-color: #ffffc0; padding: 0 5px 0 5px; } span.linenos.special { color: #000000; background-color: #ffffc0; padding: 0 5px 0 5px; } .highlight .hll { background-color: #ffffcc } .highlight { background: #ffffff; } .highlight .c { color: #888888 } /* Comment */ .highlight .err { color: #a61717; background-color: #e3d2d2 } /* Error */ .highlight .k { color: #008800; font-weight: bold } /* Keyword */ .highlight .ch { color: #888888 } /* Comment.Hashbang */ .highlight .cm { color: #888888 } /* Comment.Multiline */ .highlight .cp { color: #cc0000; font-weight: bold } /* Comment.Preproc */ .highlight .cpf { color: #888888 } /* Comment.PreprocFile */ .highlight .c1 { color: #888888 } /* Comment.Single */ .highlight .cs { color: #cc0000; font-weight: bold; background-color: #fff0f0 } /* Comment.Special */ .highlight .gd { color: #000000; background-color: #ffdddd } /* Generic.Deleted */ .highlight .ge { font-style: italic } /* Generic.Emph */ .highlight .gr { color: #aa0000 } /* Generic.Error */ .highlight .gh { color: #333333 } /* Generic.Heading */ .highlight .gi { color: #000000; background-color: #ddffdd } /* Generic.Inserted */ .highlight .go { color: #888888 } /* Generic.Output */ .highlight .gp { color: #555555 } /* Generic.Prompt */ .highlight .gs { font-weight: bold } /* Generic.Strong */ .highlight .gu { color: #666666 } /* Generic.Subheading */ .highlight .gt { color: #aa0000 } /* Generic.Traceback */ .highlight .kc { color: #008800; font-weight: bold } /* Keyword.Constant */ .highlight .kd { color: #008800; font-weight: bold } /* Keyword.Declaration */ .highlight .kn { color: #008800; font-weight: bold } /* Keyword.Namespace */ .highlight .kp { color: #008800 } /* Keyword.Pseudo */ .highlight .kr { color: #008800; font-weight: bold } /* Keyword.Reserved */ .highlight .kt { color: #888888; font-weight: bold } /* Keyword.Type */ .highlight .m { color: #0000DD; font-weight: bold } /* Literal.Number */ .highlight .s { color: #dd2200; background-color: #fff0f0 } /* Literal.String */ .highlight .na { color: #336699 } /* Name.Attribute */ .highlight .nb { color: #003388 } /* Name.Builtin */ .highlight .nc { color: #bb0066; font-weight: bold } /* Name.Class */ .highlight .no { color: #003366; font-weight: bold } /* Name.Constant */ .highlight .nd { color: #555555 } /* Name.Decorator */ .highlight .ne { color: #bb0066; font-weight: bold } /* Name.Exception */ .highlight .nf { color: #0066bb; font-weight: bold } /* Name.Function */ .highlight .nl { color: #336699; font-style: italic } /* Name.Label */ .highlight .nn { color: #bb0066; font-weight: bold } /* Name.Namespace */ .highlight .py { color: #336699; font-weight: bold } /* Name.Property */ .highlight .nt { color: #bb0066; font-weight: bold } /* Name.Tag */ .highlight .nv { color: #336699 } /* Name.Variable */ .highlight .ow { color: #008800 } /* Operator.Word */ .highlight .w { color: #bbbbbb } /* Text.Whitespace */ .highlight .mb { color: #0000DD; font-weight: bold } /* Literal.Number.Bin */ .highlight .mf { color: #0000DD; font-weight: bold } /* Literal.Number.Float */ .highlight .mh { color: #0000DD; font-weight: bold } /* Literal.Number.Hex */ .highlight .mi { color: #0000DD; font-weight: bold } /* Literal.Number.Integer */ .highlight .mo { color: #0000DD; font-weight: bold } /* Literal.Number.Oct */ .highlight .sa { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Affix */ .highlight .sb { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Backtick */ .highlight .sc { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Char */ .highlight .dl { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Delimiter */ .highlight .sd { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Doc */ .highlight .s2 { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Double */ .highlight .se { color: #0044dd; background-color: #fff0f0 } /* Literal.String.Escape */ .highlight .sh { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Heredoc */ .highlight .si { color: #3333bb; background-color: #fff0f0 } /* Literal.String.Interpol */ .highlight .sx { color: #22bb22; background-color: #f0fff0 } /* Literal.String.Other */ .highlight .sr { color: #008800; background-color: #fff0ff } /* Literal.String.Regex */ .highlight .s1 { color: #dd2200; background-color: #fff0f0 } /* Literal.String.Single */ .highlight .ss { color: #aa6600; background-color: #fff0f0 } /* Literal.String.Symbol */ .highlight .bp { color: #003388 } /* Name.Builtin.Pseudo */ .highlight .fm { color: #0066bb; font-weight: bold } /* Name.Function.Magic */ .highlight .vc { color: #336699 } /* Name.Variable.Class */ .highlight .vg { color: #dd7700 } /* Name.Variable.Global */ .highlight .vi { color: #3333bb } /* Name.Variable.Instance */ .highlight .vm { color: #336699 } /* Name.Variable.Magic */ .highlight .il { color: #0000DD; font-weight: bold } /* Literal.Number.Integer.Long */
# This file is dual licensed under the terms of the Apache License, Version
# 2.0, and the BSD License. See the LICENSE file in the root of this repository
# for complete details.

from __future__ import absolute_import, division, print_function

INCLUDES = """
#include <openssl/bio.h>
"""

TYPES = """
typedef struct bio_st BIO;
typedef void bio_info_cb(BIO *, int, const char *, int, long, long);
struct bio_method_st {
    int type;
    const char *name;
    int (*bwrite)(BIO *, const char *, int);
    int (*bread)(BIO *, char *, int);
    int (*bputs)(BIO *, const char *);
    int (*bgets)(BIO *, char *, int);
    long (*ctrl)(BIO *, int, long, void *);
    int (*create)(BIO *);
    int (*destroy)(BIO *);
    long (*callback_ctrl)(BIO *, int, bio_info_cb *);
    ...;
};
typedef struct bio_method_st BIO_METHOD;
struct bio_st {
    BIO_METHOD *method;
    long (*callback)(struct bio_st *, int, const char *, int, long, long);
    char *cb_arg;
    int init;
    int shutdown;
    int flags;
    int retry_reason;
    int num;
    void *ptr;
    struct bio_st *next_bio;
    struct bio_st *prev_bio;
    int references;
    unsigned long num_read;
    unsigned long num_write;
    ...;
};
typedef ... BUF_MEM;

static const int BIO_TYPE_MEM;
static const int BIO_TYPE_FILE;
static const int BIO_TYPE_FD;
static const int BIO_TYPE_SOCKET;
static const int BIO_TYPE_CONNECT;
static const int BIO_TYPE_ACCEPT;
static const int BIO_TYPE_NULL;
static const int BIO_CLOSE;
e7874ec7951b09d85e959dd2c6ed261b6'>Be more conservative with printing decimal numbers in verilog backend
Clifford Wolf2014-08-021-2/+3
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* Improved verilog output for ordinary $mux cellsClifford Wolf2014-08-021-3/+19
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* More cleanups related to RTLIL::IdString usageClifford Wolf2014-08-021-6/+6
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* Renamed port access function on RTLIL::Cell, added param access functionsClifford Wolf2014-07-311-40/+40
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* Added support for "upto" wires to Verilog front- and back-endClifford Wolf2014-07-281-9/+22
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* Using log_assert() instead of assert()Clifford Wolf2014-07-281-3/+2
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* Refactoring: Renamed RTLIL::Design::modules to modules_Clifford Wolf2014-07-271-1/+1
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* Refactoring: Renamed RTLIL::Module::cells to cells_Clifford Wolf2014-07-271-3/+3
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* Refactoring: Renamed RTLIL::Module::wires to wires_Clifford Wolf2014-07-271-4/+4
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* Added RTLIL::Cell::has(portname)Clifford Wolf2014-07-261-2/+2
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* Manual fixes for new cell connections APIClifford Wolf2014-07-261-4/+4
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* Changed users of cell->connections_ to the new API (sed command)Clifford Wolf2014-07-261-43/+43
| | | | | | | | | git grep -l 'connections_' | xargs sed -i -r -e ' s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g; s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g; s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g; s/(->|\.)connections_.push_back/\1connect/g; s/(->|\.)connections_/\1connections()/g;'
* Renamed RTLIL::{Module,Cell}::connections to connections_Clifford Wolf2014-07-261-43/+43
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* Various RTLIL::SigSpec related code cleanupsClifford Wolf2014-07-251-21/+29
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* Removed RTLIL::SigSpec::optimize()Clifford Wolf2014-07-231-3/+0
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* SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, ↵Clifford Wolf2014-07-221-2/+2
| | | | created interim RTLIL::SigSpec::chunks_rw()
* SigSpec refactoring: using the accessor functions everywhereClifford Wolf2014-07-221-29/+29
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* SigSpec refactoring: renamed chunks and width to __chunks and __widthClifford Wolf2014-07-221-29/+29
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* Use functions instead of always blocks for $mux/$pmux/$safe_pmux in verilog ↵Clifford Wolf2014-07-201-17/+21
| | | | backend
* Added support for $bu0 to verilog backendClifford Wolf2014-07-201-0/+16
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* Added $slice and $concat cell typesClifford Wolf2014-02-071-0/+22
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* Added support for non-const === and !== (for miter circuits)Clifford Wolf2013-12-271-6/+8
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* Replaced signed_parameters API with CONST_FLAG_SIGNEDClifford Wolf2013-12-041-1/+1
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* Replaced RTLIL::Const::str with generic decoder methodClifford Wolf2013-12-041-8/+11
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* Added proper dumping of signed/unsigned parameters to verilog backendClifford Wolf2013-11-241-4/+6
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* Renamed "placeholder" to "blackbox"Clifford Wolf2013-11-221-7/+7
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