| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
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| * | | | | | | Add support {A,B,P}REG packing | Eddie Hung | 2019-07-16 | 2 | -55/+94 | |
| * | | | | | | SigSpec::extract to allow negative length | Eddie Hung | 2019-07-16 | 1 | -1/+1 | |
| * | | | | | | Add support for {A,B,P}REG in DSP48E1 | Eddie Hung | 2019-07-16 | 1 | -5/+21 | |
| * | | | | | | Do not swap if equals | Eddie Hung | 2019-07-15 | 1 | -1/+1 | |
| * | | | | | | SigSpec::extend_u0() to return *this | Eddie Hung | 2019-07-15 | 2 | -2/+3 | |
| * | | | | | | Oops forgot these files | Eddie Hung | 2019-07-15 | 3 | -2/+12 | |
| * | | | | | | Add xilinx_dsp for register packing | Eddie Hung | 2019-07-15 | 3 | -2/+192 | |
| * | | | | | | OUT port to Y in generic DSP | Eddie Hung | 2019-07-15 | 2 | -3/+3 | |
| * | | | | | | Move DSP mapping back out to dsp_map.v | Eddie Hung | 2019-07-15 | 2 | -41/+40 | |
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| * | | | | | Only swap if B_WIDTH > A_WIDTH | Eddie Hung | 2019-07-15 | 1 | -1/+1 | |
| * | | | | | Tidy up | Eddie Hung | 2019-07-15 | 1 | -39/+26 | |
| * | | | | | Move DSP48E1 model out of cells_xtra, initial multiply one in cells_sim | Eddie Hung | 2019-07-15 | 2 | -82/+131 | |
| * | | | | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-07-15 | 16 | -30/+639 | |
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| | * | | | | Merge pull request #1194 from cr1901/miss-semi | Eddie Hung | 2019-07-14 | 1 | -2/+2 | |
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| | | * | | | Fix missing semicolon in Windows-specific code in aigerparse.cc. | William D. Jones | 2019-07-14 | 1 | -2/+2 | |
| | * | | | | Merge pull request #1183 from whitequark/ice40-always-relut | Clifford Wolf | 2019-07-12 | 1 | -11/+5 | |
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| | | * | | | synth_ice40: switch -relut to be always on. | whitequark | 2019-07-11 | 1 | -10/+4 | |
| | | * | | | synth_ice40: fix help text typo. NFC. | whitequark | 2019-07-11 | 1 | -1/+1 | |
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| | * | | | Merge pull request #1182 from koriakin/xc6s-bram | Eddie Hung | 2019-07-11 | 9 | -8/+598 | |
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| | | * | | | synth_xilinx: Initial Spartan 6 block RAM inference support. | Marcin Kościelnicki | 2019-07-11 | 9 | -8/+598 | |
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| | * | | | Merge pull request #1185 from koriakin/xc-ff-init-vals | Eddie Hung | 2019-07-11 | 2 | -6/+6 | |
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| | | * | | | xilinx: Fix the default values for FDPE/FDSE INIT attributes to match ISE/Viv... | Marcin Kościelnicki | 2019-07-11 | 2 | -6/+6 | |
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| | * / / | Enable &mfs for abc9, even if it only currently works for ice40 | Eddie Hung | 2019-07-11 | 1 | -1/+1 | |
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| | * | | Merge pull request #1172 from whitequark/write_verilog-Sa-as-qmark | Clifford Wolf | 2019-07-11 | 1 | -2/+8 | |
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| | | * | | write_verilog: write RTLIL::Sa aka - as Verilog ?. | whitequark | 2019-07-09 | 1 | -2/+8 | |
| | * | | | Merge pull request #1179 from whitequark/attrmap-proc | Clifford Wolf | 2019-07-11 | 1 | -0/+19 | |
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| | | * | | | attrmap: also consider process, switch and case attributes. | whitequark | 2019-07-10 | 1 | -0/+19 | |
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| * | | | | Move dsp_map.v into cells_map.v; cleanup synth_xilinx a little | Eddie Hung | 2019-07-10 | 4 | -45/+42 | |
| * | | | | Merge remote-tracking branch 'origin/master' into xc7dsp | Eddie Hung | 2019-07-10 | 34 | -271/+734 | |
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| | * | | | Merge pull request #1180 from YosysHQ/eddie/no_abc9_retime | Eddie Hung | 2019-07-10 | 3 | -6/+15 | |
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| | | * | | | Error out if -abc9 and -retime specified | Eddie Hung | 2019-07-10 | 3 | -6/+15 | |
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| | * | | | Merge pull request #1148 from YosysHQ/xc7mux | Eddie Hung | 2019-07-10 | 7 | -49/+415 | |
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| | | * | | | Add some spacing | Eddie Hung | 2019-07-10 | 1 | -9/+9 | |
| | | * | | | Add some ASCII art explaining mux decomposition | Eddie Hung | 2019-07-10 | 1 | -0/+21 | |
| | | * | | | Call muxpack and pmux2shiftx before cmp2lut | Eddie Hung | 2019-07-09 | 1 | -9/+12 | |
| | | * | | | Restore opt_clean back to original place | Eddie Hung | 2019-07-09 | 1 | -2/+1 | |
| | | * | | | Restore missing techmap -map +/cmp2lut.v with LUT_WIDTH=6 | Eddie Hung | 2019-07-09 | 1 | -0/+2 | |
| | | * | | | Extend using A[1] to preserve don't care | Eddie Hung | 2019-07-09 | 1 | -1/+9 | |
| | | * | | | Merge remote-tracking branch 'origin/eddie/fix1173' into xc7mux | Eddie Hung | 2019-07-09 | 2 | -4/+9 | |
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| | | * | | | | Extend during mux decomposition with 1'bx | Eddie Hung | 2019-07-09 | 1 | -24/+3 | |
| | | * | | | | Fix typo and comments | Eddie Hung | 2019-07-09 | 1 | -4/+4 | |
| | | * | | | | Merge remote-tracking branch 'origin/master' into xc7mux | Eddie Hung | 2019-07-09 | 16 | -79/+348 | |
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| | | * | | | | synth_xilinx to call commands of synth -coarse directly | Eddie Hung | 2019-07-09 | 1 | -3/+20 | |
| | | * | | | | Revert "synth_xilinx to call "synth -run coarse" with "-keepdc"" | Eddie Hung | 2019-07-09 | 1 | -2/+2 | |
| | | * | | | | Fix spacing | Eddie Hung | 2019-07-09 | 1 | -1/+1 | |
| | | * | | | | Fix spacing | Eddie Hung | 2019-07-09 | 1 | -1/+1 | |
| | | * | | | | Decompose mux inputs in delay-orientated (rather than area) fashion | Eddie Hung | 2019-07-08 | 1 | -18/+30 | |
| | | * | | | | Do not call opt -mux_undef (part of -full) before muxcover | Eddie Hung | 2019-07-08 | 1 | -1/+5 | |
| | | * | | | | Add one more comment | Eddie Hung | 2019-07-08 | 1 | -0/+3 | |
| | | * | | | | Less thinking | Eddie Hung | 2019-07-08 | 1 | -3/+3 | |
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index : iCE40/yosys | |
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