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* Merge branch 'YosysHQ-master'Aman Goel2018-07-0428-189/+1348
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| * Merging with official repoAman Goel2018-07-0428-189/+1348
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| * Fix verific eventually handlingClifford Wolf2018-06-291-6/+5
| * Add verific support for eventually propertiesClifford Wolf2018-06-291-5/+105
| * Add "verific -formal" and "read -formal"Clifford Wolf2018-06-291-7/+15
| * Add "read -sv -D" supportClifford Wolf2018-06-281-2/+25
| * Add "read -undef"Clifford Wolf2018-06-281-0/+32
| * Fix handling of signed memoriesClifford Wolf2018-06-281-0/+3
| * Add YOSYS_NOVERIFIC env variable for temporarily disabling verificClifford Wolf2018-06-221-22/+40
| * Add simplified "read" command, enable extnets in implicit Verific importClifford Wolf2018-06-211-0/+84
| * Merge branch 'master' of github.com:YosysHQ/yosysClifford Wolf2018-06-201-1/+1
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| | * Merge pull request #572 from q3k/q3k/fix-protobuf-buildClifford Wolf2018-06-201-1/+1
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| | | * Fix protobuf buildSergiusz Bazanski2018-06-201-1/+1
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| * / Add automatic verific import in hierarchy commandClifford Wolf2018-06-203-1/+75
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| * Merge pull request #571 from q3k/q3k/protobuf-backendClifford Wolf2018-06-195-0/+560
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| | * Add Protobuf backendSerge Bazanski2018-06-195-0/+560
| * | Be slightly less aggressive in "deminout" passClifford Wolf2018-06-191-4/+28
| * | Merge pull request #570 from edcote/patch-4Clifford Wolf2018-06-191-4/+4
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| | * Include module name for area summary statsEdmond Cote2018-06-181-4/+4
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| * Bugfix in liberty parser (as suggested by aiju in #569)Clifford Wolf2018-06-151-1/+1
| * Add "synth_ice40 -json"Clifford Wolf2018-06-131-9/+22
| * Fix ice40_opt for cases where a port is connected to a signal with width != 1Clifford Wolf2018-06-111-9/+25
| * Merge pull request #561 from udif/pr_skip_typoClifford Wolf2018-06-061-1/+1
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| | * Fixed typo (sikp -> skip)Udi Finkelstein2018-06-051-1/+1
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| * Add (* gclk *) attribute supportClifford Wolf2018-06-014-1/+23
| * Add setundef -anyseq / -anyconst support to -undriven modeClifford Wolf2018-06-011-3/+11
| * Add "setundef -anyconst"Clifford Wolf2018-06-011-20/+41
| * Bugfix in handling of array instances with empty portsClifford Wolf2018-05-311-1/+1
| * Update examples/cmos/counter.ys to use "synth" commandClifford Wolf2018-05-301-5/+5
| * Make -nordff the default in "prep"Clifford Wolf2018-05-301-9/+13
| * Update ABC to git rev 6df1396Clifford Wolf2018-05-301-1/+1
| * Disable memory_dff for initialized FFsClifford Wolf2018-05-281-1/+19
| * Add some cleanup code to memory_nordffClifford Wolf2018-05-281-26/+36
| * Add comment to VIPER #13453 work-aroundClifford Wolf2018-05-281-0/+1
| * Fix Verific handling of single-bit anyseq/anyconst wiresClifford Wolf2018-05-251-2/+4
| * Fix VerificClocking for cases where Verific generates chains of PRIM_SVA_POSEDGEClifford Wolf2018-05-241-1/+1
| * Fix verific handling of anyconst/anyseq attributesClifford Wolf2018-05-242-16/+28
| * Merge pull request #454 from rqou/emscripten-and-abcClifford Wolf2018-05-194-15/+87
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| | * Force abc to align memory to 8 bytesRobert Ou2018-05-181-1/+1
| | * Modify emscripten main to mount nodefs and to run arg as a scriptRobert Ou2018-05-181-1/+18
| | * Force abc to be linked statically and without threads in emscriptenRobert Ou2018-05-181-0/+5
| | * Fix infinite loop in abc command under emscriptenRobert Ou2018-05-181-5/+7
| | * Fix reading techlibs under emscriptenRobert Ou2018-05-181-1/+1
| | * Add options to disable abc's usage of pthreads and readlineRobert Ou2018-05-181-0/+10
| | * Add an option to statically link abc into yosysRobert Ou2018-05-182-4/+38
| | * Makefile: Make abc always use stdint.hRobert Ou2018-05-181-4/+8
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| * Merge pull request #550 from jimparis/yosys-upstreamClifford Wolf2018-05-171-1/+6
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| | * Support SystemVerilog `` extension for macrosJim Paris2018-05-171-1/+5
| | * Skip spaces around macro argumentsJim Paris2018-05-171-0/+1
| * | Merge pull request #551 from olofk/ice40_cells_sim_portsClifford Wolf2018-05-171-43/+23
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