Commit message (Expand) | Author | Age | Files | Lines | ||
---|---|---|---|---|---|---|
... | ||||||
| | | | | * | | | Remove stat command form shifter.ys test | SergeyDegtyar | 2019-09-04 | 1 | -1/+1 | |
| | | | | * | | | Fix ecp5 tests | SergeyDegtyar | 2019-09-04 | 11 | -2421/+26 | |
| | | | | * | | | Uncomment sat command in memory.ys test. | SergeyDegtyar | 2019-09-03 | 1 | -2/+1 | |
| | | | | * | | | Add tests for ECP5 architecture | SergeyDegtyar | 2019-09-03 | 40 | -0/+3201 | |
| | | | | | * | | hierarchy - proc reorder | Miodrag Milanovic | 2019-10-18 | 4 | -9/+10 | |
| | | | | | * | | Cleanup and formating | Miodrag Milanovic | 2019-10-04 | 4 | -2/+4 | |
| | | | | | * | | split latches into separate checks | Miodrag Milanovic | 2019-10-04 | 2 | -41/+24 | |
| | | | | | * | | check muxes per type | Miodrag Milanovic | 2019-10-04 | 2 | -42/+37 | |
| | | | | | * | | check ff's separately | Miodrag Milanovic | 2019-10-04 | 2 | -26/+14 | |
| | | | | | * | | Cleanup top modules and not used defines | Miodrag Milanovic | 2019-10-04 | 5 | -44/+5 | |
| | | | | | * | | remove alu test | Miodrag Milanovic | 2019-10-04 | 2 | -36/+0 | |
| | | | | | * | | Merge branch 'SergeyDegtyar/anlogic' of https://github.com/SergeyDegtyar/yosy... | Miodrag Milanovic | 2019-10-04 | 23 | -0/+536 | |
| |_|_|_|_|/| | |/| | | | | | | | ||||||
| | | | | | * | | Merge branch 'master' into SergeyDegtyar/anlogic | Sergey | 2019-10-01 | 126 | -1686/+30035 | |
| | | | | | |\ \ | ||||||
| | | | | | * | | | run-test.sh Move $x at end of line. | Sergey | 2019-10-01 | 1 | -1/+1 | |
| | | | | | * | | | Add new tests for Anlogic architecture | SergeyDegtyar | 2019-09-23 | 23 | -0/+536 | |
| | | | | |/ / / | ||||||
| | | | | | | * | hierarchy - proc reorder | Miodrag Milanovic | 2019-10-18 | 6 | -13/+15 | |
| | | | | | | * | FF should be initialized to 0 | Miodrag Milanovic | 2019-10-04 | 1 | -1/+3 | |
| | | | | | | * | Split mux tests per type | Miodrag Milanovic | 2019-10-04 | 2 | -38/+36 | |
| | | | | | | * | Split latch check | Miodrag Milanovic | 2019-10-04 | 2 | -45/+24 | |
| | | | | | | * | Add missing latch mapping | Miodrag Milanovic | 2019-10-04 | 1 | -0/+12 | |
| | | | | | | * | split rest od ff's | Miodrag Milanovic | 2019-10-04 | 3 | -30/+17 | |
| | | | | | | * | Separate check for ff's types | Miodrag Milanovic | 2019-10-04 | 2 | -47/+48 | |
| | | | | | | * | Cleaned tests | Miodrag Milanovic | 2019-10-04 | 5 | -49/+4 | |
| | | | | | | * | Remove not needed tests | Miodrag Milanovic | 2019-10-04 | 6 | -75/+0 | |
| | | | | | | * | Merge branch 'SergeyDegtyar/efinix' of https://github.com/SergeyDegtyar/yosys... | Miodrag Milanovic | 2019-10-04 | 31 | -0/+710 | |
| |_|_|_|_|_|/| |/| | | | | | | | ||||||
| | | | | | | * | run-test.sh Move $x at end of line. | Sergey | 2019-10-01 | 1 | -1/+1 | |
| | | | | | | * | Merge branch 'master' into SergeyDegtyar/efinix | Sergey | 2019-10-01 | 126 | -1686/+30035 | |
| | | | | | | |\ | | | | | | | |/ | | | | | | |/| | ||||||
| | | | | | | * | Add new tests for Efinix architecture. | SergeyDegtyar | 2019-09-23 | 31 | -0/+710 | |
| | | | | | |/ | | | | | |/| | ||||||
* | | | | | | | Change smtbmc "Warmup failed" status to "PREUNSAT" | Clifford Wolf | 2019-10-03 | 1 | -14/+14 | |
* | | | | | | | Update ABC to git rev 623b5e8 | Clifford Wolf | 2019-10-03 | 1 | -1/+1 | |
* | | | | | | | Bump version | Clifford Wolf | 2019-10-03 | 1 | -1/+1 | |
* | | | | | | | Merge pull request #1419 from YosysHQ/eddie/lazy_derive | Clifford Wolf | 2019-10-03 | 2 | -35/+59 | |
|\ \ \ \ \ \ \ | ||||||
| * | | | | | | | Fix for svinterfaces | Eddie Hung | 2019-09-30 | 1 | -2/+8 | |
| * | | | | | | | module->derive() to be lazy and not touch ast if already derived | Eddie Hung | 2019-09-30 | 2 | -33/+51 | |
| | |_|_|/ / / | |/| | | | | | ||||||
* | | | | | | | Merge pull request #1422 from YosysHQ/eddie/aigmap_select | Clifford Wolf | 2019-10-03 | 2 | -6/+50 | |
|\ \ \ \ \ \ \ | ||||||
| * | | | | | | | Add quick test | Eddie Hung | 2019-09-30 | 1 | -0/+10 | |
| * | | | | | | | Add -select option to aigmap | Eddie Hung | 2019-09-30 | 1 | -6/+40 | |
| | |_|_|_|_|/ | |/| | | | | | ||||||
* | | | | | | | Merge pull request #1429 from YosysHQ/clifford/checkmapped | Clifford Wolf | 2019-10-03 | 2 | -27/+56 | |
|\ \ \ \ \ \ \ | |_|_|_|_|/ / |/| | | | | | | ||||||
| * | | | | | | Add "check -allow-tbuf" | Clifford Wolf | 2019-10-03 | 1 | -8/+22 | |
| * | | | | | | Add "check -mapped" | Clifford Wolf | 2019-10-02 | 2 | -21/+36 | |
* | | | | | | | Merge pull request #1425 from YosysHQ/dave/ecp5_pdp16 | David Shah | 2019-10-03 | 6 | -2/+184 | |
|\ \ \ \ \ \ \ | ||||||
| * | | | | | | | ecp5: Fix shuffle_enable port | David Shah | 2019-10-01 | 1 | -2/+2 | |
| * | | | | | | | ecp5: Add support for mapping 36-bit wide PDP BRAMs | David Shah | 2019-10-01 | 6 | -1/+183 | |
| | |/ / / / / | |/| | | | | | ||||||
* | | | | | | | Merge pull request #1423 from YosysHQ/eddie/techmap_replace_wire | Eddie Hung | 2019-10-02 | 2 | -0/+32 | |
|\ \ \ \ \ \ \ | |_|_|_|/ / / |/| | | | | | | ||||||
| * | | | | | | Also rename cells with _TECHMAP_REPLACE_. prefix, as per @cliffordwolf | Eddie Hung | 2019-10-02 | 1 | -4/+8 | |
| * | | | | | | Extend test with renaming cells with prefix too | Eddie Hung | 2019-10-02 | 1 | -0/+2 | |
| * | | | | | | Add test | Eddie Hung | 2019-09-30 | 1 | -0/+16 | |
| * | | | | | | techmap wires named _TECHMAP_REPLACE_.<identifier> to create alias | Eddie Hung | 2019-09-30 | 1 | -0/+10 | |
| |/ / / / / | ||||||
* | | | / / | log_dump() to support State enum | Eddie Hung | 2019-10-02 | 3 | -0/+6 | |
| |_|_|/ / |/| | | | | ||||||
* | | | | | Merge pull request #1428 from YosysHQ/clifford/fixbtor | Clifford Wolf | 2019-10-02 | 1 | -6/+9 | |
|\ \ \ \ \ | |_|/ / / |/| | | | |