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* Use equiv_opt for latchesEddie Hung2019-08-282-58/+10
* Merge remote-tracking branch 'origin/clifford/async2synclatch' into Sergey/te...Eddie Hung2019-08-2867-586/+3616
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| * Add $dlatch support to async2syncClifford Wolf2019-08-281-1/+36
| * Merge pull request #1325 from YosysHQ/eddie/sat_initClifford Wolf2019-08-282-2/+8
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| | * Ignore all 1'bx in (* init *)Eddie Hung2019-08-271-3/+1
| | * Revert to using cleanEddie Hung2019-08-271-1/+1
| | * Wire with init on FF part, 1'bx on non-FF partEddie Hung2019-08-241-1/+3
| | * Blocking assignmentEddie Hung2019-08-231-1/+1
| | * In sat: 'x' in init attr should not override constantEddie Hung2019-08-223-1/+7
| * | xilinx: Add SRLC16E primitive.Marcin Kościelnicki2019-08-271-1/+21
| * | Merge pull request #1292 from YosysHQ/mwk/xilinx_bufgmapEddie Hung2019-08-2716-223/+1075
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| | * | improve clkbuf_inhibit propagation upwards through hierarchyMarcin Kościelnicki2019-08-272-6/+45
| | * | Improve tests to check that clkbuf is connected to expectedEddie Hung2019-08-261-6/+21
| | * | Merge branch 'master' into mwk/xilinx_bufgmapEddie Hung2019-08-268-60/+405
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| | * \ \ Merge branch 'master' into mwk/xilinx_bufgmapEddie Hung2019-08-231-1/+1
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| | * \ \ \ Merge branch 'master' into mwk/xilinx_bufgmapEddie Hung2019-08-233-18/+36
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| | * | | | | Check clkbuf_inhibit=1 is ignored for custom selectionEddie Hung2019-08-231-0/+1
| | * | | | | clkbufmap to only check clkbuf_inhibit if no selection givenEddie Hung2019-08-231-5/+18
| | * | | | | Add simple clkbufmap testsEddie Hung2019-08-231-0/+52
| | * | | | | tests/techmap/run-test.sh to cope with *.ysEddie Hung2019-08-232-7/+18
| | * | | | | Mention clkbuf_inhibit can be overriddenEddie Hung2019-08-231-7/+8
| | * | | | | Review comment from @cliffordwolfEddie Hung2019-08-231-1/+2
| | * | | | | Merge remote-tracking branch 'origin/master' into mwk/xilinx_bufgmapEddie Hung2019-08-23146-1486/+4373
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| | * \ \ \ \ \ Merge remote-tracking branch 'origin/master' into mwk/xilinx_bufgmapEddie Hung2019-08-1657-3403/+3432
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| | * | | | | | | README updatesMarcin Kościelnicki2019-08-131-0/+14
| | * | | | | | | move attributes to wiresMarcin Kościelnicki2019-08-138-311/+546
| | * | | | | | | minor review fixesMarcin Kościelnicki2019-08-132-3/+5
| | * | | | | | | review fixesMarcin Kościelnicki2019-08-134-47/+34
| | * | | | | | | Add clock buffer insertion pass, improve iopadmap.Marcin Kościelnicki2019-08-1310-93/+577
| * | | | | | | | Add "make bumpversion"Clifford Wolf2019-08-272-0/+4
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| * | | | | | | Remove dupe in CHANGELOG, missing end quoteEddie Hung2019-08-261-2/+1
| * | | | | | | Merge tag 'yosys-0.9'Clifford Wolf2019-08-262-11/+107
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| | * | | | | | | Yosys 0.9Clifford Wolf2019-08-261-1/+1
| | * | | | | | | Revert earliest to gcc-4.8, compile iverilog with default compilerEddie Hung2019-08-232-3/+3
| | * | | | | | | Revert "Bump to gcc-5 as `__warn_memset_zero_len' symbol not in 16.04!?!"Eddie Hung2019-08-231-5/+3
| | * | | | | | | Remove .0 from clang-8.0Eddie Hung2019-08-231-2/+2
| | * | | | | | | Bump to gcc-5 as `__warn_memset_zero_len' symbol not in 16.04!?!Eddie Hung2019-08-231-3/+5
| | * | | | | | | bionic -> xenial as its on whitelistEddie Hung2019-08-231-1/+1
| | * | | | | | | Bump gcc from 4.8 to 4.9 as undefined referenceEddie Hung2019-08-231-35/+7
| | * | | | | | | Make macOS depenency clearMiodrag Milanovic2019-08-231-2/+5
| | * | | | | | | do not require boost if pyosys is not usedMiodrag Milanovic2019-08-221-0/+2
| | * | | | | | | require tcl-tk in BrewfileChris Shucksmith2019-08-221-0/+1
| | * | | | | | | Bump year in copyright noticeClifford Wolf2019-08-223-3/+3
| | * | | | | | | Visual Studio build fixMiodrag Milanovic2019-08-021-0/+1
| | * | | | | | | Fix linking issue for new mxe and pthreadMiodrag Milanovic2019-08-021-1/+2
| | * | | | | | | Fix yosys linking for mxeMiodrag Milanovic2019-08-021-1/+1
| | * | | | | | | New mxe hacks needed to support 2ca237eMiodrag Milanovic2019-08-021-0/+4
| | * | | | | | | Fix formatting for msys2 mingw build using GetSizeMiodrag Milanovic2019-08-028-17/+20
| | * | | | | | | Update CHANGELOGDavid Shah2019-07-261-10/+101
| | * | | | | | | Merge pull request #1175 from whitequark/write_verilog-fix-case-attr-positionClifford Wolf2019-07-091-3/+2