| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Revert "Merge branch 'eddie/split_shiftx' into xc7mux" | Eddie Hung | 2019-04-26 | 9 | -158/+14 |
| * | Missing newline | Eddie Hung | 2019-04-26 | 1 | -1/+1 |
| * | Add -undef option to equiv_opt, passed to equiv_induct | Eddie Hung | 2019-04-26 | 1 | -3/+16 |
| * | Actually use pm.st.shiftxB | Eddie Hung | 2019-04-25 | 2 | -3/+6 |
| * | Cleanup superseded | Eddie Hung | 2019-04-25 | 1 | -11/+1 |
| * | bitblast_shiftx -> split_shiftx | Eddie Hung | 2019-04-25 | 1 | -2/+2 |
| * | Fix for when B_WIDTH has trailing zeroes | Eddie Hung | 2019-04-25 | 1 | -5/+9 |
| * | Merge remote-tracking branch 'origin/eddie/split_shiftx' into xc7mux | Eddie Hung | 2019-04-25 | 4 | -16/+157 |
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| | * | In order to indicate a failed pattern, blacklist? | Eddie Hung | 2019-04-25 | 2 | -15/+16 |
| | * | Add test | Eddie Hung | 2019-04-25 | 2 | -0/+139 |
| | * | Elaborate on help message | Eddie Hung | 2019-04-25 | 1 | -1/+2 |
| * | | Merge branch 'eddie/split_shiftx' into xc7mux | Eddie Hung | 2019-04-25 | 9 | -14/+149 |
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| | * | Add split_shiftx command | Eddie Hung | 2019-04-25 | 2 | -0/+134 |
| | * | Make pmgen support files more generic | Eddie Hung | 2019-04-25 | 2 | -6/+9 |
| | * | Misspelling | Eddie Hung | 2019-04-25 | 1 | -1/+1 |
| | * | Merge pull request #957 from YosysHQ/oai4fix | Clifford Wolf | 2019-04-23 | 2 | -2/+2 |
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| | | * | Fixes for OAI4 cell implementation | David Shah | 2019-04-23 | 2 | -2/+2 |
| | * | | Format some names using inline code | Eddie Hung | 2019-04-23 | 1 | -2/+2 |
| | * | | Fix spelling | Eddie Hung | 2019-04-23 | 1 | -1/+1 |
| | * | | Remove some left-over log_dump() | Clifford Wolf | 2019-04-23 | 1 | -2/+0 |
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| | * | Merge pull request #914 from YosysHQ/xc7srl | Eddie Hung | 2019-04-22 | 8 | -41/+382 |
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| * | | | synth_xilinx to call bitblast_shiftx | Eddie Hung | 2019-04-25 | 1 | -1/+4 |
| * | | | Remove topo sort no-loop assertion, with test | Eddie Hung | 2019-04-24 | 4 | -14/+76 |
| * | | | Add -nocarry option to synth_xilinx | Eddie Hung | 2019-04-24 | 1 | -5/+14 |
| * | | | Fix abc9 with (* keep *) wires | Eddie Hung | 2019-04-23 | 2 | -6/+52 |
| * | | | Refactor into AigerReader::post_process() | Eddie Hung | 2019-04-23 | 2 | -249/+161 |
| * | | | Tweak | Eddie Hung | 2019-04-22 | 1 | -1/+1 |
| * | | | Fix for A_WIDTH == 2 but B_WIDTH==3 | Eddie Hung | 2019-04-22 | 1 | -1/+1 |
| * | | | Trim A_WIDTH by Y_WIDTH-1 | Eddie Hung | 2019-04-22 | 1 | -1/+1 |
| * | | | Add comment | Eddie Hung | 2019-04-22 | 1 | -0/+3 |
| * | | | Fix for mux_case_* mappings | Eddie Hung | 2019-04-22 | 1 | -17/+9 |
| * | | | Fix for non-pow2 width muxes | Eddie Hung | 2019-04-22 | 1 | -9/+18 |
| * | | | Add synth_xilinx -nomux option | Eddie Hung | 2019-04-22 | 2 | -4/+18 |
| * | | | Cleanup, call pmux2shiftx even without -nosrl | Eddie Hung | 2019-04-22 | 6 | -45/+30 |
| * | | | Merge branch 'xaig' into xc7mux | Eddie Hung | 2019-04-22 | 31 | -283/+953 |
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| | * | | | Temporarily remove 'r' extension | Eddie Hung | 2019-04-22 | 2 | -95/+7 |
| | * | | | Allow POs to be PIs in XAIG | Eddie Hung | 2019-04-22 | 1 | -7/+4 |
| | * | | | Remove kernel/cost.cc since master has refactored it | Eddie Hung | 2019-04-22 | 2 | -76/+0 |
| | * | | | Merge remote-tracking branch 'origin/master' into xaig | Eddie Hung | 2019-04-22 | 46 | -97/+4201 |
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| | | * | | Merge pull request #952 from YosysHQ/clifford/fix370 | Clifford Wolf | 2019-04-22 | 1 | -3/+18 |
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| | | | * | | Determine correct signedness and expression width in for loop unrolling, fixe... | Clifford Wolf | 2019-04-22 | 1 | -3/+18 |
| | | * | | | Merge pull request #951 from YosysHQ/clifford/logdebug | Clifford Wolf | 2019-04-22 | 11 | -53/+183 |
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| | | | * | | | Add log_debug() framework | Clifford Wolf | 2019-04-22 | 11 | -53/+183 |
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| | | * | | | Merge pull request #949 from YosysHQ/clifford/pmux2shimprove | Clifford Wolf | 2019-04-22 | 2 | -3/+24 |
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| | | | * | | | Updaye pmux2shiftx test | Clifford Wolf | 2019-04-22 | 1 | -2/+2 |
| | | | * | | | Add full_pmux feature to pmux2shiftx | Clifford Wolf | 2019-04-22 | 1 | -1/+22 |
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| | | * | | | Merge pull request #953 from YosysHQ/clifford/fix948 | Clifford Wolf | 2019-04-22 | 1 | -0/+8 |
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| | | | * | | | Add support for zero-width signals to Verilog back-end, fixes #948 | Clifford Wolf | 2019-04-22 | 1 | -0/+8 |
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| | * | | | | Merge remote-tracking branch 'origin/clifford/libwb' into xaig | Eddie Hung | 2019-04-21 | 1 | -1/+1 |
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| | * | | | | | Convert to use #945 | Eddie Hung | 2019-04-21 | 2 | -9/+3 |
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index : iCE40/yosys | |
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